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TM 11-6625-3145-14
Theory of Operation-318/338 Service
A02U202 receives ECL-level differential data from channel 8 of the parallel data probe. The data enters the circuit board
via pins 22 and 10 of J204, and connects to pins 10 and 9 of A02U202.
The data is applied to the differential inputs of a receiver. From the receiver, the data is sent through the delay line DL1
06A to enable the timing to meet its setup-and-hold-time specification. On the rising edge of each clock (entering
A02U202 at pin 1), data, glitch, and glitch trigger are clocked, then sent off from pins 8, 2, and 14, respectively.
Operation of channels A02U204, A02U206, A02U208, A02U210, A02U212, A02U214, A02U216, A02U100, A02U102,
A02U104, A02U106, A02U108, A02U110, A02U112, and A02U114 are the same as for channel 8 (A02U202).
The glitch output goes high if at least two data transitions occur between rising edges of the clock.
If the glitch recognizer off/on line (pin 15, GRC) Is low, the glitch recognizer out line (pin 14, GR) indicates the presence of
one or more glitches. (The (GRC line is controlled by shift registers A02U118 and A02U218.) If the GRC line is high, the
output line from pin 14 is disabled. The glitch trigger outputs of the 16 M21 8s are wire-ORed together. so whenever any
channel detects a glitch, that line moves to high.
ADDRESS DECODER <2>
The address decoder circuit consists of A01 U130 and A01U132. A01U132 is a TTL-to-ECL-level converter. U130
decodes 1/0 addresses 00, 01, 02, and 03. 1/O address 00 (A01U130 pin 11) is used to write trigger word data into the
Word Recognizer memory from channel 0 to channel 15. I/O address 01 (A01U130 pin 10) is a clock selector port. I/O
address 02 (A01U130 pin 9) resets the word recognizer memory address counter. This port also controls glitch trigger on
and off. I/O address 03 (A01U130 pin 7) increments the word recognizer address counter.
EXTERNAL CLOCK INPUT <4>
The external clock input is a high input-impedance (1 M(2) buffer. Transistor A04Q108A is connected as a source
follower. Transistor Q108B maintains a constant current flow through A04Q108A. The dc balance adjustment, R234.
sets the dc offset voltage of the source follower to 0 V.
EXTERNAL CLOCK COMPARATOR <4>
A02U236A compares the input signal from the source follower with a reference voltage divided by A02R238, A02R239,
and A02R240. This circuitry multiplies one-fourth the CLK Threshold level from the A05 ROM/Threshold board by two-
fifths to match the P6107 external clock probe attenuation (1/4 x 2/5 = 1/10). If the input signal level is more positive than
the reference voltage, A02U236 pin 1 is high and A02U236 pin 2 is low R239 compensates for the Q108’s source-drain
resistor variation.
CLOCK SELECTOR <4>
Data from shift register A02U224 controls A02U222A, A02U226B, A02U226A, and A02U244A. The MPU sets one of
these gates to low (enabled); then EXT
↑
, EXT
↓
, or INT CLK is selected.
These gates have three outputs. One clocks eight M218s on the A02 Input-B board, another clocks eight M218s on the
A01 Input-A board, and the third is distributed to the A03 ACQ Control board.
4-6
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Страница 182: ...338 VERIFICATION AND ADJUSTMENT PROCEDURES ...
Страница 253: ...318 ___________________ TROUBLESHOOTING TREES ...
Страница 269: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 7 318 Word recognizer test ...
Страница 278: ...TM 11 6625 3145 14 Maintenance Troubleshooting 31 8 338 Service Figure 7 10 318 N and DELAY counter test 7 25 ...
Страница 313: ...TM 11 6625 3145 14 Figure 7 19 Troubleshooting Tree 8 Data Acquisition ACQ A01 A02 Sheet 4 of 6 7 60 ...
Страница 344: ...338 TROUBLESHOOTING TREES ...
Страница 362: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service 4434 567 Figure 7 39 338 Word recognizer test 7 109 ...
Страница 371: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service 4434490 Figure 7 42 338 N and DELAY counter test 7 118 ...
Страница 421: ...TM 11 6625 3145 14 Maintenance Troubleshooting 318 338 Service Figure 7 55 Troubleshooting Tree 12 T H A01 A02 7 169 ...
Страница 517: ...TM 11 6625 3145 14 318 338 4434 923 318 Block Diagram ...
Страница 518: ...TM 11 6625 3145 14 318 338 4434 924 338 Block Diagram ...
Страница 519: ...TM 11 6625 3145 14 318 338 4434 925 318 Acquisition Module Wiring Diagram ...
Страница 520: ...TM 11 6625 3145 14 318 338 4434 926 318 338 Mainframe Wiring Diagram ...
Страница 521: ...TM 11 6625 3145 14 318 338 4434 926 338 Acquisition Module Wiring Diagram ...
Страница 522: ...TM 11 6625 3145 14 318 338 4434 928 Figure 9 1 318 A01 Input A Board Component Locations ...
Страница 526: ...TM 11 6625 3145 14 ...
Страница 528: ...TM 11 6625 3145 14 Figure 9 3 318 338 A03 ACQ Control Board Component Locations ...
Страница 532: ...TM 11 6625 3145 14 ...
Страница 536: ...TM 11 6625 3145 14 ...
Страница 538: ...TM 11 6625 3145 14 ...
Страница 539: ...TM 11 6625 3145 14 ...
Страница 540: ...TM 11 6625 3145 14 ...
Страница 541: ...TM 11 6625 3145 14 ...
Страница 542: ...TM 11 6625 3145 14 Figure 9 8 318 338 A10 CRT Board Component Locations ...
Страница 544: ...TM 11 6625 3145 14 Figure 9 9 318 338 A11 Inverter Board component Locations ...
Страница 546: ...TM 11 6625 3145 14 Figure 9 10 318 338 A12 Regulator Board Component Locations ...
Страница 548: ...TN 11 6625 3145 14 Figure 9 11 318S1 338S1 A07 Serial RS232 Non Volatile Memory Board Component Locations ...
Страница 551: ...TM 11 6625 3145 14 Figure 9 12 338 A01 Input A Board Component Locations ...
Страница 553: ...TM 11 6625 3145 14 318 338 SERVICE ...
Страница 554: ......
Страница 555: ...PIN 058584 ...