Tektronix 2213, Инструкция по эксплуатации

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Theory of Operation—2213 Service
Step Balance potentiometer R138 (at pin 1 o f R139) is
adjusted to compensate fo r input offsets reaching U120
pins 2 and 3 when switching between VO LTS/DIV switch
positions.
In the fast path, the input signal is ac-coupled to input
FET Q122 through C121. The input FET is arranged in a
source-follower configuration used to drive complementary
emitter followers Q133 and Q134. The combination o f
Q125, R126, R131, R132, VR130, and R130 sets a
constant current through R125 in the source lead o f Q122.
The voltage drop across R125 biases Q133 and Q134 fo r
about a 10-mA idle current.
A bootstrap circuit composed o f Q139, VR122, and
R122 connects the Q122 drain to the Q122 source. This
circuit forces the bias voltage across Q122 to remain con­
stant, which in conjunction w ith the constant bias current
supplied by R125, keeps Q122 operating at a constant
power level to prevent distortion due to changing signal
currents.
Complementary em itter followers Q133 and Q134
supply drive current to the -M, -f2.5, and -f5 voltage dividers
and provide impedance matching between input FET Q122
and the divider network. The bias levels o f Q133 and Q134
are stabilized by emitter resistors R139A and R139E
respectively. Average voltage changes occurring in the out­
put o f Q133 and Q134 are sensed through R139B and
R139D which are connected to the point o f lowest
impedance (the emitters o f Q133 and Q134). Resistor
R139C provides a path that completes the feedback loop
to the slow-path portion o f the Buffer Am plifier.
Volts/Div Var Circuit and X 1 /X 1 0 Amplifier
The appropriate voltage divider signal output (-5-1, -^2.5,
or f-5) is selected by VO LTS/D IV switch S105B and routed
to the Volts/D iv Var circuit composed o f C141, R141,
and R143. Changes that occur in the Buffer A m plifier
output impedance due to setting R141 or switching the
divider o utput are sensed via R139M. These changes m odify
the slow-path feedback signal to cause U 120 to again match
the gain o f both paths.
From the Volts/Div Var circuit, the signal is applied to
the input o f the X1/X10 Switchable-gain Am plifier U145.
A m plifier U145 produces a differential output signal from
the single-ended input signal. The gain o f the amplifier is
controlled by the setting o f VO LTS/DIV switch S105.
Am plifier gain is changed by switching between two
pairs o f transistor amplifiers contained in U145. Gain o f the
X10 amplifier pair is adjusted by R145 to obtain the
correct deflection factor fo r the 2m, 5m, and 10m VO LTS/
D IV switch positions. Resistors R146, R147, and R148
act to balance any dc offsets between the X I and X10
amplifiers. Trace shift occurring when the VO LTS/DIV
Variable control is rotated is minimized by resistor R142
which stabilizes the input bias current to U145.
VERTICAL PREAMPS
The Channel 1 and Channel 2 Preamp circuitry, shown
in Diagram 2, includes the vertical preamplifiers, the
internal trigger p icko ff amplifiers, and a common-base
output stage fo r each channel. Vertical positioning o f the
channel display is incorporated in the common-base
am plifier stage.
Channel 1 Vertical Preamplifier
The Channel 1 Vertical Preamplifier produces d iffer­
ential output signals to drive the Vertical O utput A m plifier
and internal trigger signals to drive the Trigger circuitry.
Differential signal current from the Attenuator circuitry
is applied to common-base transistors Q157 and Q167
through cable-terminating resistors R151 and R161
respectively. The collector currents o f Q157 and Q167 w ill
flo w through R158 and R168 to produce level-shifted
signals which drive U170D and U170E. Balance potenti­
ometer R154 is adjusted to balance the dc level o f the
Channel 1 output w ith the Channel 2 output by setting the
bias levels o f Q157 and Q167. Channel 1 frequency
response is matched to Channel 2 response by adjusting
C l 67.
Transistors U170D and U170E form a common-emitter
amplifier. The gain o f U170D and U170E is set by R180
(connected between the emitters), and the high-frequency
response is compensated by C l80. The emitters are also
connected to the bases o f U170C and U170B respectively
to provide an internal trigger signal p icko ff point. Vertical
signal output current flows from the collectors o f U170D
and U170E to the emitters o f common-base amplifiers
Q177 and Q187. A shunt resistor gain network (R176 and
R186) sets the gain o f the common-base stage. Channel 1
POSITION control R190 supplies a variable offset current
to the emitters of Q177 and Q187 which allows the trace
to be vertically positioned on the crt. The common-base
amplifier stage converts the differential signal input current
to a differential signal output voltage that is applied to the
Diode Gate circuitry (Diagram 3).
Channel 2 Vertical Preamplifier
The Channel 2 Vertical Preamplifier functions the same
as the Channel 1 Vertical Preamplifier previously described.
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