Chapter 1: Introduction
1-9
Introduction
1-2
Chipset Overview
The Intel E7501 chipset is a high-performance chipset with a performance
and feature-set designed for mid-range, dual processor servers. The
E7501 chipset consists of four major components: the Memory Controller
Hub (MCH), the I/O Controller Hub 3 (ICH3), the PCI-X 64-bit Hub 2.0 (P64H2)
and the 82808AA Host Channel Adapter (VxB).
The MCH has four hub interfaces, one to communicate with the ICH3 and
three for high-speed I/O communications. The MCH employs a 144-bit wide
memory bus for a DDR-266 memory interface, which provides a total band-
width of 3.2 GB/s. The ICH3 interface is a 266 MB/sec point-to-point con-
nection using an 8-bit wide, 66 MHz base clock at a 4x data transfer rate.
The P64H2 interface is a 1 GB/s point-to-point connection using a 16-bit
wide, 66 MHz base clock at a 8x data transfer rate.
The ICH3 I/O Controller Hub provides various integrated functions, including
a two-channel UDMA100 bus master IDE controller, USB host controllers, a
System Management Bus controller and an AC'97 compliant interface.
The P64H2 PCI-X Hub provides a 16-bit connection to the MCH for high-
performance IO capability and two 64-bit PCI-X interfaces.
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Special Features
ATI Graphics Controller
The X5DPR-TG2+ has an integrated ATI video controller based on the Rage
XL graphics chip. The Rage XL fully supports sideband addressing and
AGP texturing. This onboard graphics package can provide a bandwidth of
up to 512 MB/sec over a 32-bit graphics memory bus.
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond
when AC power is lost and then restored to the system. You can choose
for the system to remain powered off (in which case you must hit the
power switch to turn it back on) or for it to automatically return to a power-
on state. See the Power Lost Control setting in the Advanced BIOS Setup
section (Peripheral Device Configuration) to change this setting. The de-
fault setting is Always On.
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