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SuperServer SYS-5039MC-H8TRF User's Manual
Figure 1-6. Motherboard Layout
1.5 Motherboard Layout
Below is a layout of the X11SCD-F motherboard with jumper, connector, and LED locations
shown. See the table on the following page for descriptions. For detailed descriptions, pinout
information, and jumper settings, refer to Chapter 4.
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BIOS LICENSE
BAR C
ODE
M
AC C
ODE
DESIGNED IN USA
X11SCD-F
REV:1.01
PCH
C246
BT1
MH2
MH1
MH4
MH9
LED3
LED2
JTPM1
JPWR1
S-SGPIO1
SAS0
SAS1
JMD1
JMD2
JPCIE1
BMC_HB_LED1
JBT1
SW2
JCPLD1
JKVM1
JUIDB1
JPG1
JPO1
JWD1
J6
JVR1
SRW5
SRW2
SRW3
SRW1
SRW4
MH5
MH3
MH6
MH8
MH7
JPME2
BMC
PCI-E 3.0 X4 / I-SATA4
JMD2:M.2-H
JMD1:M.2-H
PCI-E 3.0 X4 / I-SATA1
2-3:A
OC SAS
1-2:ONBO
ARD SA
TA
J6:SA
TA/SAS SELEC
T
2-3:DISABLE
1-2:ENABLE
JPO1:CPU THROTTLE WHEN PWR_FAIL
USB0/1
JTPM1:TPM/PORT80
JBT1:CMOS CLEAR
CPU SL
O
T1 PCIE 3.0 X8
JWD1:WATCH DOG
1-2:RST
2-3:NMI
2-3:DISABLE
1-2:ENABLE
2-3:ME MANUFACTURING MODE
VGA
JPG1:
JPME2:
1-2:NORMAL
CPU
CPU MICR
O
-LP PCIE 3.0 X8
UID
DIMMB2 DIMMB1 DIMMA2 DIMMA1
JPCIE1
BT1
MLP PCI-E
DIMMB2
DIMMB1
DIMMA2
DIMMA1
JVR1
J6
SAS0
SAS1
JPWR1
S-SGPIO1
LED1
JPG1
JPO1
JBT1
JMD1/M.2
JMD2/M.2-H
LED2
LED3
SRW1
JTPM1
SRW2
SRW5
JKVM1
JUIDB1
JPME2
JWD1
SW2
SRW4
SRW3
JCPLD1