SST-PFB3-PCI
Hardware Reference Guide
3.1.2 Control Register
This register is a group of control and status bits.
Table 5: Control Register Settings
Bit
7
6
5
4
3
2
1
0
Name
CardRun MemEn IntEn WdTout HostIrq1 HostIrq0 CardIrq1 CardIrq0
Read/Write
R/W R/W R/W R R/W R/W R/W R/W
Reset
0 0 0 0 0 0 0 0
Hardware Register Details
25
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