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STR-DA7100ES
STR-DA7100ES
6-4. BLOCK DIAGRAM – DSP SECTION –
M/S SEL
DSP
IC2
LRCK
BCK
SCK
RST
RST
SBRST
M/S SEL
M/S SEL
FR
FL
1 VINL
VINR
LRCK
BCK
SCKI
PDWN
2
10
11
15
7
A/D CONVERTER
IC2024
LRCK
BCK
SL
SCK
RST
1
SR
VINL
VINR
LRCK
BCK
SCKI
PDWN
2
10
11
15
7
A/D CONVERTER
IC2025
LRCK
BCK
C
SCK
RST
1
SW
VINL
VINR
LRCK
BCK
SCKI
PDWN
2
10
11
15
7
A/D CONVERTER
IC2026
LRCK
BCK
IRESET
9742-INIT
TXD0
RXD0
CTS
RTS
D.SD
SBL
1
DIR-RMCK
A
B
S
AD RST
SB RST
DIR-RERR
DIR-AUDIO
SBR
VINL
VINR
LRCK
BCK
2
10
11
M/S SEL
MODE0
19
MODE1
20
SCK
SCKI
15
SBRST
PDWN
7
A/D CONVERTER
IC2031
DOUT 12
IBCK
ILRCK
IERROR
IMCK
24MHz
22MHz
DOUT 12
DOUT 12
DOUT 12
BUFFER
IC2030
BUFFER
IC2017
FLIP-FLOP
IC2032
SB MCK
DIR-BCK
BCK
DIR-LRCK
LRCK
DIR-XMCK
SCK
SB BCK
SB LRCK
SB-DATA
IERROR
9742-INIT
TXD0
IRESET
RXD0
RTS
CTS
DATA1
DATA2
DATA3
B2
B3
B1
6
B0
3
10
2 A0
A2
A3
A1
5
11
14
79 DPSIB
78 DPSIA
DPSID
DPSIC
80
81
65
DPSOB
64
DPSOA
DPSOD
DPSOC 70
71
DPSOE 77
DPSIE
SDO2
SDO1
SDO4
SDO3
82
DPDVBCK 87
DPDVLRCK 86
LRCK
MCK
BCK
XSPIDS 122
INT_REQ 15
XRESET 121
DPBCK
89
DPLRCK
88
DIR-ERR
16
XTAL
143
CLKIN
142
DPFSCK
94
XNONAUDIO
97
13
DATA SELECTER
IC2019
Y0 4
Y1 7
Y2 9
Y3 12
S
1
14 A3
A0
B0
A2
11
B2
10
B3
13
2
3
CLOCK SELECTER
IC2018
Y3 12
Y2 9
Y0 4
3 1C3
1C1
5
1C0
6
1C2
4
CLOCK
SELECTER
IC2020
Y1 7
B
2
A
14
SHIFT
REGISTER
IC2022
TXDO
ILINK TX
119
RXDO
ILINK RX
120
RTS
ILINK RTS
128
CTS
ILINK CTS
127
9742-INIT
9742 INIT
68
IERROR
IH ERROR
67
IRESET
ILINK RESET
121
SF_DSP_MAS
SF DSP MAS
22
SF_CPU_CE
SF CPU CE
21
DSP_MOSI
DSP MOSI
16
DSP_MISO
DSP MISO
15
DSP_SPICLK
DSP SPICLK
14
DSP_SPIDS
*
DSP (LAT)
13
DSP_INT
DSP INT
99
DSP_RESET
*
DSP RESET
12
FSRATE
164
SYSTEM CONTROLLER
IC2054 (2/4)
XSF_CE 98
SPI_MAS 63
MISO 126
SPICLK 125
MOSI 127
CE#
1
SCK
6
SI
5
SO
2
FLIP-FROP
IC4
SF_CPU_CE
SF_DSP_MAS
DSP_MOSI
DSP_MISO
DSP_SPICLK
BUFFER
IC5
SERIAL FLASH
IC3
XWR 35
XRD
A16, A17, A18
AD0 – AD15
XWE
I/O0–I/O15
A0–A18
XOE
39
17
41
ALE 40
34, 33, 30, 29, 26 – 24
17, 52 – 49, 46, 43 – 41
53, 56, 57
S-RAM
IC7
1D1–1D8, 2D1–2D8
1Q1 – 1Q8
2Q1 – 2Q8
1LE
2LE
48
25
47, 76, 44, 43, 41, 40
38–35, 33, 32, 30, 29, 27, 26
2, 3, 5, 6, 8, 9, 11–14
16, 17, 19, 20, 22, 23
ADDRESS LATCH
IC6
1–5·18–28·42–44
7–10, 13–16,
29–32, 35–38
DSP_SPIDS
*
DSP_INT
DSP_RESET
ERROR
SB LRCK
SB MCK
SB BCK
SB DATA
M/S SEL
SB LRCK
SB MCK
SB BCK
SB DATA
M/S SEL
X1
25MHz
: AUDIO (DIGITAL)
: AUDIO (ANALOG)
SIGNAL PATH
+1.2V
REGULATOR
IC1
DSP+1.2V
17
18
19
11
4
1
15
(NC)
S
1
(NC)
DSP+2.5V
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