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48
STR-DA7100ES
Pin No.
Pin Name
I/O
Description
59
RSSTART
I
Data receive start signal input terminal
60
SACHSEL
I
SA-CD channel select signal input terminal
61
FMUTE
-
Not used
62, 63
FSTATE0, FSTATE1
O
FSTATE signal output terminal
64
FSTATE2
-
Not used
65
TDI
-
Not used
66
TDO
-
Not used
67
TMS
-
Not used
68
TCK
-
Not used
69
TRST
-
Not used
70
SANKIN
I
Audio data transfer clock signal input terminal
71
SAFRIN
I
Sync signal input terminal for DSD audio signal
72
SAD0IN
I
DSD audio signal input terminal
73
VSSCO
-
Ground terminal
74
VDDCO
-
Power supply terminal (+3.3V)
75 to 79
SAD1IN to SAD5IN
I
DSD audio signal input terminal
80
SADAIN
I
DSD audio signal input terminal
81
AMCKIN
I
Clock signal input terminal
82
SPDIFIN
I
SPDIF audio signal input terminal
83
SDMUTEIN
I
Muting on/off control signal input terminal
84
SDERRIN
-
Not used
85
VCO2O
O
Clock signal output terminal
86
VCO1O
O
Serial data transfer clock signal output terminal
87
REFSTY
I
Signal input terminal for fase comparate
88
VCOIN
I
Clock signal input terminal for phase comparison
89
VCOEN
-
Not used
90
VSSCORE
-
Ground terminal
91
VDDCORE
-
Power supply terminal (+3.3V)
92
VSSO
-
Ground terminal
93
VSSPASS
-
Ground terminal
94
VDDPASS
-
Power supply terminal (+3.3V)
95
LPOUT
-
Not used
96
LPIN
-
Not used
97
VDDO
-
Power supply terminal (+3.3V)
98
BCKIN
I
Bit clock signal (2.8224 MHz) input terminal
99
LRCKIN
I
L/R sampling clock (44.1 kHz) input terminal
100 to 102
SDA1IN to SDA3IN
I
Audio signal input terminal
103
SDA0IN
I
PCM audio supplementary signal input terminal
104
VSSO
-
Ground terminal
105
VDDO
-
Power supply terminal (+3.3V)
106 to 119
SDA0 to SDA13
O
Address signal output to the SD-RAM
120 to 127
SDD0 to SDD7
I/O
Two-way data bus with the SD-RAM
128
VSSO
-
Ground terminal
129
VDDO
-
Power supply terminal (+3.3V)
130 to 137
SDD8 to SDD15
I/O
Two-way data bus with the SD-RAM
138
SDCKE
O
Clock enable signal output to the SD-RAM
139
SDCLK
O
Clock signal output to the SD-RAM
140
SDDQM
O
Output terminal of data input/output mask
141
SDRAS
O
Row address strobe signal output to the SD-RAM
142
SDCAS
O
Column address strobe signal output to the SD-RAM