35
STR-DA7100ES
DIGITAL BOARD IC2028 CXD9722TQ (LIP SYNC ADJUST)
Pin No.
Pin Name
I/O
Description
1 to 5
D1 to D5
I/O
Serial data input/output terminal with the SD-RAM
6
VDD
-
Power supply terminal (+3.3V)
7, 8
D6, D7
I/O
Serial data input/output terminal with the SD-RAM
9
VSS
-
Ground terminal
10
WE
O
Write enable signal output to the SD-RAM
11
CAS
O
Column address strobe signal output to the SD-RAM
12
RAS
O
Row address strobe signal output to the SD-RAM
13
CS
O
Chip select signal output to the SD-RAM
14
CLK
O
Serial data transfer clock signal output to the SD-RAM
15
CKE
O
Clock enable signal output to the SD-RAM
16
VDD
-
Power supply terminal (+3.3V)
17, 18
A11, A10
O
Address signal output to the SD-RAM
19 to 22
A0 to A3
O
Address signal output to the SD-RAM
23
VSS
-
Ground terminal
24 to 29
A9 to A4
O
Address signal output to the SD-RAM
30
VSS
-
Ground terminal
31
DRSO
O
SR-ch analog audio signal output terminal Not used
32
DLSO
O
SL-ch analog audio signal output terminal Not used
33
DEXRO
O
Not used (open)
34
DLFEO
O
W-ch analog audio signal output terminal Not used
35
DCO
O
C-ch analog audio signal output terminal Not used
36
VDD
O
Power supply terminal (+3.3V)
37
DRO
O
R-ch analog audio signal output terminal Not used
38
DLO
O
L-ch analog audio signal output terminal Not used
39
VSS
-
Ground terminal
40
DMRO
O
SBR-ch analog audio signal output terminal Not used
41
DMLO
O
SBL-ch analog audio signal output terminal Not used
42
VSS
-
Ground terminal
43
VDD
-
Power supply terminal (+3.3V)
44
DLDRO
O
Audio serial data output terminal
45
CSWO
O
Audio serial data output terminal
46
SLSRO
O
Audio serial data output terminal
47
FLFRO
O
Audio serial data output terminal
48
VSS
-
Ground terminal
49
SPDIFO
O
SPDIF signal output terminal Not used
50
TEST1
I
Test mode setting terminal Not used
51
TRST
I
Reset signal input terminal for test Not used
52
TMS
I
Mode setting terminal for test Not used
53
TCK
I
Clock signal input terminal for test Not used
54
TDI
I
Serial data input terminal for test Not used
55
TDO
O
Serial data output terminal for test Not used
56
TEST2
I
Test mode setting terminal Not used
57
SPDIFI
I
SPDIF signal input terminal Not used
58
VSS
-
Ground terminal
59
LRCKI
I
L/R sampling clock signal (44.1 kHz) input from the digital signal processor
60
BCKI
I
Bit clock signal (2.8224 MHz) input from the digital signal processor
61
VDD
-
Power supply terminal (+3.3V)
62
VSS
-
Ground terminal
63
DLDRI
I
Audio serial data input from the digital signal processor
