Sony KV-32XBR400, Руководство по обслуживанию

Страница: 40 / 126

—
40
—
K
V-32XBR400/36XBR400/36XBR400H/38DRC1/38DRC1C
Control Register
Function & Link Data
Type
Data
Range
Comment
Full Vcomp1 Vcomp2
0
HBLK
HBLK_SW: Horizontal blanking switch 0, 1
1 LBLK LEFT_BLK: Left blanking 0~63 50
2 RBLK RIGHT_BLK: Right blanking 0~63 27
3
VBLK
VBLK_SW: Vertical blanking switch 0, 1 1
4 TBLK UP_BLK: Top blanking 0~(7)~15 1 8 12
( ): Settings at center
5 BBLK LO_BLK: Bottom blanking 0~(7)~15 0 13 13
6 VCMP V_COMP: Vertical compensation 0~15 0 0 0
7 HCMP H_COMP: Horizontal compensation 0~15 0
8 ACMP AFC_COMP: AFC compensation 0~7 0
9 PCMP PIN_COMP: Pin compensation 0~7 0
10 AFCM AFC_MODE: AFC loop gain 0~3 2
11 VFRQ V_FREQ: Vertical frequency 0~3
12 VON V_ON: Vertical drive on 0, 1
13 JUMP JMP_SW: Reference pulse jump swtich 0, 1 0
14
VDJP
VDRV_SW: Vertical drive jump switch 0, 1 0 0 1
15 VDST RST_SW: Vertical drive start switch 0, 1 0 0 1
16 EWDC EW_DC: Pin DC level shift 0, 1 0
17
AKBT
AKBTIM: AKB timing 0~31 20 20 10
1
Data Initial/Average Settings
(32V&36V CRTs)
Register
No & Name
DX1A SERVICE LIST (#4-3):
CXA2150D-3 {Deflection Controls: D3}
3
1
1
1
45
24
Full: 480p/960i (4x3) display
Vcomp1: 480p/960i (16x9) display
Vcomp2: 1080i (16x9) display
0
1
0
0
Note:
0
Device Name: CXA2150Q { CRT Driver / SONY } / IC201 (A-board) / P/N: 8-752-093-35 (SBorSD#: NA)
Slave Address: 86h
Control Register
Function & Link Data
Type
Data
Range
Comment
480i
(15.75 KHz)
480p
(31.50 KHz)
1080i
(33.75 KHz)
0 MTRX MAT_OUT: Selection of color matrix conversion types
Micro
0~3 0 0 1
1 GAIN
GAIN_SEL:
Selection of output signals for S LYOUT, S LCBOUT, S LCROUT
C 0~3 0
2 CBGN
YGAIN, CBGAIN, CRGAIN:
The gain control of S LYOUT, S LCBOUT, & S LCROUT
C 0~15 9
3 VTC V_TC: Setting of Vsync separation time constant C 0~3 1
4 HWID H_WIDTH: Setting of the output pulsewidth of SELHOUT C 0~3 1
Video5 Video6 Sub
5
HSEP
HSEP_SEL: Setting for the sync separation system 0, 1 0 0 0
6 TEST TEST: Test mode selection (for device tests) C 0, 1 0
7 FRGB
The forced RGB selection (for tests)
{0: MAT OUT = MTRX (#0), 1: MAT OUT = MTRX (#3)}
C 0, 1 0
Full Vcomp1 Vcomp2
8 HMSK Hsync masking in vertical retrace 0, 1 0
Note:
1
Video5&6:
YPbPr-480i/480p/1080i inputs
Sub: 480i input from the sub-channel
Full: 480p/960i (4x3) display
Vcomp1: 480p/960i (16x9) display
Vcomp2: 1080i (16x9) display
C: Common data
Register
No & Name
Data Initial/Average Settings
(
32V&36V CRTs)
Device Name: CXA2151Q { Component I/F & Sync Seperation / SONY } / IC3001 (B-board) / P/N: 8-752-093-84 (SD#: S00302B)
Slave Address: 84h
DX1A SERVICE LIST (#5):
CXA2151Q