HCD-X10
37
37
HCD-X10
6-12. SCHEMATIC DIAGRAM – MAIN Section (5/11) –
•
See page 71 for Waveforms.
•
See page 74 for IC Block Diagrams.
•
See page 82 for IC Pin Function Description.
1.2
1.2
1.2
1.2
3.2
1.6
3.2
1
1.2
2.5
2.5
1
2.5
4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.6
3.2
3.2
1.6
1.2
1.2
3.2
3.2
1.2
1.2
1.2
1.2
0
3.2
3.3
3.2
3.2
3.3
1.2
3.2
0.5
0
0
0
0
1.5
1.6
3.6
3.2
3.2
3.2
3.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
3.2
3.2
3.2
0
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
3.2
3.2
0
1.6
1.6
1.6
1.6
1.6
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
3.2
3.2
1.6
1.6
1.6
22
R26
10k
R42
0
100
R90
22
R67
0.1
C47
10k
R32
0.1
C50
0.1
C44
0.01
C8
0
100
R92
0.1
C28
10
R36
22
R30
10
C18
0.1
C17
1k
R24
1k
R50
0.1
C10
0.1
C9
2k
R14
1M
10k
R43
0.01
C13
0.22
C70
0.1
C46
0
22
R28
0.1
C40
0.1
C36
0
R49
0
R1
10
C4
0.1
C33
10k
R13
0.1
C23
220k
R3
1k
R4
0.1
C62
0.1
C11
0
22
R65
0.1
C49
0.1
C63
0.1
C12
X1
0.1
C7
0
R25
0.1
C65
10
C53
22
R66
22
R27
0.1
C51
22
R29
100
R34
R17
0
0.1
C45
10k
R41
1
2
3
4
5
SI-3010KM-TL
IC5
EN
IN
GND
OUT
FB
0.1
C35
0.1
C26
0.1
C32
0
100
R91
220
0.1
C15
0
R10
10k
R2
0.1
C14
10
C43
0.1
C48
10k
R45
8
7
6
5
4
3
2
1
TC7WZ08FK(TE85R)
IC6
GND
Vcc
10k
R44
0.1
C69
1
2
3
4
5
SI-3010KM-TL
IC9
EN
IN
GND
OUT
FB
1k
R9
15k
R7
0.1
C71
1k
R8
0
R70
RT1P140C-TP-1
Q1
0.1
C59
SW+3.3V
E+4V
D-GND
AMP_D1
AMP_D2
AMP_D3
AMP_BCKO
AMP_LRCKO
SI_A
SI_B
BCK
LRCK
MCK
DIR_NONAU
DSP_INT
DSP_RESET
DIR_RERR
DSP_SPIDS
DSP_MISO
DSP_MOSI
DSP_SPICLK
P_CONT_DSP
DIR_XSTATE
0
R60
1k
R47
47
R53
0.1
C39
0.1
C31
0.1
C22
0.1
C25
0.1
C24
0
R52
0.1
C34
0.1
C27
0
R51
0.1
C37
22
R54
0
R59
0
R58
0.1
C29
0
R48
0.1
C30
16V
100
C68
4V
220
C58
16V
100
C72
4V
220
C52
C56
100
16V
4V
220
C66
5
4
3
2
1
74LVC1G79GW-L5
IC4
D
CLK
DGND
Q
VCC
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
ADSST-AVR-1115
IC1
VDDINT
CLKCFG0
CLKCFG1
BOOTCFG0
BOOTCFG1
GND
VDDEXT
GND
VDDINT
GND
VDDINT
GND
VDDINT
GND
INT_REQ
DIR_ERR
AD7
GND
VDDINT
GND
VDDEXT
GND
VDDINT
AD6
AD5
AD4
VDDINT
GND
AD3
AD2
VDDEXT
GND
AD1
AD0
WR
∗
VDDINT
VDDINT
GND
RD
∗
ALE
AD15
AD14
AD13
GND
VDDEXT
AD12
VDDINT
GND
AD11
AD10
AD9
AD8
A16
VDDINT
GND
A17
A18
GND
VDDEXT
VDDINT
GND
PF_CE
SPI_MAS
DPSOA
DPSOB
VDDINT
GND
VDDINT
GND
DPSOC
DPSOD
VDDINT
VDDEXT
GND
VDDINT
GND
DPSOE
DPSIA
DPSIB
DPSIC
DPSID
DPSIE
VDDINT
GND
GND
DPDVLRCK
DPDVBCK
DPLRCK
DPBCK
VDDINT
GND
GND
VDDEXT
DPFSCK
GND
VDDINT
NONAUDIO
∗
SF_CE
∗
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDINT
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDINT
GND
VDDEXT
GND
VDDINT
GND
VDDINT
RESET
∗
SPIDS
∗
GND
VDDINT
SPICLK
MISO
MOSI
GND
VDDINT
VDDEXT
AVDD
AVSS
GND
CLKOUT
EMU
∗
TDO
TDI
TRST
∗
TCK
TMS
GND
CLKIN
XTAL
VDDEXT
R11 0
R12
0
DIR_RERR
DSP_INT
AMP_D3
AMP_D1
AMP_D2
AMP_LRCKO
MOSI
DSP_MISO
SPICLK
AMP_D1
AMP_D2
AMP_D3
AMP_BCKO
AMP_LRCKO
DIR_NONAU
DSP_INT
DSP_RESET
DIR_RERR
DSP_SPIDS
DSP_MISO
DSPMCK
DIR_NONAU
SI_B
LRCK
BCK
DSPMCK
AMP_BCKO
DSP_RESET
DSP_SPIDS
LRCK
BCK
SI_B
SI_A
SPICLK
MOSI
SI_A
+1.2V REGULATOR
IC5
+2.6V REGULATOR
IC9
SWITCHING
IC6
D FLIP-FLOP
IC4
INVERTER
MAIN BOARD (5/11)
DSP
IC1
A
10
1
2
J
B
13
11
C
7
8
14
F
9
6
K
4
15
16
3
G
D
5
E
12
w w w . x i a o y u 1 6 3 . c o m
Q Q 3 7 6 3 1 5 1 5 0
9
9
2
8
9
4
2
9
8
T E L
1 3 9 4 2 2 9 6 5 1 3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299