Silicon Laboratories Si4700, Руководство по программированию

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AN332
168 Confidential Rev. 0.2
6. Control Interface
The bus mode is selected by sampling the state of the GPO1 and GPO2/INT pins on the rising edge of RST. The
GPO1 pin includes a 1 M
Ω
internal pull-up resistor that is connected while RST is low, and the GPO2/INT pin
includes an internal 1 M
Ω
pull-down resistor that is connected while the RST pin in low. Therefore, it is only
necessary for the system controller to actively drive pins if a mode other than the default 2-wire mode is required,
as shown in Table 20. After bus mode selection is complete, the device is placed in powerdown mode. The
minimum setup time for GPO1 and GPO2 before RST = 1 is 30 ns when actively driven by the system controller
and 100 µs if the internal 1 M
Ω
resistor is allowed to set the default GPO1 (high) and GPO2 (low). Refer to the
Si471x data sheet for specific reset timing requirements.
In powerdown mode, all circuitry is disabled except for the device control interface. The device comes out of
powerdown mode when the POWER_UP command is written to the command register. Once in powerup mode,
the device accepts additional commands, such as tuning, and the setting of properties, such as power level. The
device will not accept commands while in powerdown mode, with the exception of the powerup command.
If the
system controller writes a command other than POWER_UP when in powerdown mode, the device does
not respond, and a reset is required.
Setting the RST pin low places the device in reset mode. In reset mode, all circuitry is disabled including the device
control interface; registers are set to their default settings, and the control bus is disabled.
6.1. 2-Wire Control Interface Mode
Figures 5 and 6 show the 2-wire Control Interface Read and Write Timing Parameters and Diagrams, respectively.
Refer to the Si471x data sheet for timing parameter values.
Figure 5. 2-wire Control Interface Read and Write Timing Parameters
Table 20. Bus Mode Selection
Bus Mode GPO2/INT GPO1
3-wire 0 0 (must drive)
SPI 1 (must drive) 1
2-wire 0 1
SCLK
70%
30%
SDIO
70%
30%
START
START STOP
t
f:IN
t
r:IN
t
LOW
t
HIGH
t
HD:STA
t
SU:STA
t
SU:STO
t
SP
t
BUF
t
SU:DAT
t
r:IN
t
HD:DAT
t
f:IN,
t
f:OUT