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AN332
160
Confidential Rev. 0.2
Step: 1Hz
Range: 31130-34406
Property 0x0202. REFCLK_PRESCALE
Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may
be between 1 and 1023 in 1 unit steps. For example, an RCLK of 13MHz would require a prescaler value of 400 to
divide it to 32500 Hz. The reference clock frequency property would then need to be set to 32500 Hz. The RCLK
must be valid 10 ns before and 10 ns after completing the WB_TUNE_FREQ command. In addition, the RCLK
must be valid at all times when the carrier is enabled for proper AFC operation. The RCLK may be removed or
reconfigured at other times. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
This command may only be sent when in powerup mode. The default is 1.
Default: 0x0001
Step: 1
Range: 1-4095
Bit
D15 D14 D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Name
REFCLKF[15:0]
Bit
Name
Function
15:0
REFCLKF[15:0]
Frequency of Reference Clock in Hz.
The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768
5%), or 0 (to disable AFC).
Bit
D15 D14 D13 D12 D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Name
0
0
0
0
REFCLKP[11:0]
Bit
Name
Function
15:12
Reserved
Always write to 0.
11:0
REFCLKP[11:0]
Prescaler for Reference Clock.
Integer number used to divide clock frequency down to REFCLK frequency. The
allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 +/-
5%), or 0 (to disable AFC).
Содержание Si4700
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