AN332
158
Confidential Rev. 0.2
5.4.2. WB Receiver Properties
Property 0x0001. GPO_IEN
Configures the sources for the GPO2/IRQ interrupt pin. Valid sources are the lower 8 bits of the STATUS byte,
including CTS, ERR, RSQINT, SAMEINT (Si4707 only), ASQINT, and STCINT bits. The corresponding bit is set
before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
The CTS interrupt enable (CTSIEN) can be set with this property and the POWER_UP command. The state of the
CTSIEN bit set during the POWER_UP command can be read by reading the this property and modified by writing
this property. This command may only be sent when in powerup mode.
Errata:
RSQIEN is non-functional on WB component 2.0.
Default: 0x0000
Bit
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Name
0
0
0
0
RSQR
EP
SAM
ERE
P
ASQ
REP
STC
REP
CTS
IEN
ERR
IEN
0
0
RSQ
IEN
SA
MEI
EN
ASQ
IEN
STCI
EN
Bit
Name
Function
15:12
Reserved
Always write to 0.
11
RSQREP
RSQ Interrupt Repeat.
0 = No interrupt generated when RSQINT is already set (default).
1 = Interrupt generated even if RSQINT is already set.
10
SAMEREP
SAME Interrupt Repeat (Si4707 Only).
0 = No interrupt generated when SAMEINT is already set (default).
1 = Interrupt generated even if SAMEINT is already set.
9
ASQREP
ASQ Interrupt Repeat.
0 = No interrupt generated when ASQINT is already set (default).
1 = Interrupt generated even if ASQINT is already set.
8
STCREP
STC Interrupt Repeat.
0 = No interrupt generated when STCINT is already set (default).
1 = Interrupt generated even if STCINT is already set.
7
CTSIEN
CTS Interrupt Enable. After PowerUp, this bit will reflect the CTSIEN bit in ARG1 of
PowerUp Command.
0 = No interrupt generated when CTS is set.
1 = Interrupt generated when CTS is set.
6
ERRIEN
ERR Interrupt Enable.
0 = No interrupt generated when ERR is set (default).
1 = Interrupt generated when ERR is set.
5:4
Reserved
Always write to 0.
3
RSQIEN
RSQ Interrupt Enable
0 = No interrupt generated when RSQINT is set (default).
1 = Interrupt generated when RSQINT is set.
Содержание Si4700
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