Schweitzer Engineering Laboratories SEL-351-5, Инструкция по эксплуатации

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4.2
SEL-351-5, -6, -7 Relay Instruction Manual
Date Code 20070117
Loss-of-Potential, Load Encroachment, and Directional Element Logic
Loss-of-Potential Logic
The circuit breaker has to be closed (Relay Word bit 3PO = logical 0) for the
LOP logic to operate.
Loss-of-potential is declared (Relay Word bit LOP = logical 1) when a
10 percent or larger drop in V
1
is detected, with no corresponding change in I
1
or I
0
. If the LOP condition persists for 60 cycles, it latches in.
When the relay is configured for wye-connected PTs, LOP resets (Relay Word
bit LOP = logical 0) when V
1
returns above 75 percent of setting VNOM
(Relay Word bit V1GOOD also asserts) and V
0
is less than 7.8 percent of
setting VNOM.
When the relay is configured for delta-connected PTs, LOP resets (Relay
Word bit LOP = logical 0) when V
1
returns above 43 percent of setting
VNOM (Relay Word bit V1GOOD also asserts) and V
2
is less than
4.5 percent of setting VNOM.
The loss-of-potential enable setting, ELOP, does not enable or disable the
LOP logic. It just routes the LOP Relay Word bit to different logic, as shown
in
Figure 4.1 and explained in the remainder of this subsection.
LOP is disabled while 3PO is asserted (breaker open). If an input potential is
lost during this time, LOP will not assert when 3PO deasserts (breaker close)
since the 10 percent drop in V
1
has already occurred. This is the case for
systems using either line-side or bus-side potential transformers.
Setting VNOM = OFF
If setting VNOM = OFF, the loss-of-potential logic is disabled (Relay Word
bits LOP and V1GOOD are forced to logical 0), and setting ELOP can only be
set to “N.” See
Potential Transformer Ratios and PT Nominal Secondary
Voltage Settings on page 9.42 for more details on the VNOM setting.
Setting ELOP = Y or
Y1
If setting ELOP = Y or Y1 and a loss-of-potential condition occurs (Relay
Word bit LOP asserts to logical 1), all internal enables (see NOTE 1 below)
(except for 32IE) are disabled (see
Figure 4.6 , Figure 4.7 , Figure 4.8 , and
Figure 4.21 ). The loss-of-potential condition makes the voltage-polarized
directional elements (which are controlled by these internal enables)
unreliable. Thus, they are disabled. The overcurrent elements controlled by
these voltage-polarized directional elements are disabled also (unless
overridden by conditions explained in
Setting ELOP = Y on page 4.3 ).
The channel IN current-polarized directional element ( Figure 4.11 ) is
controlled by internal enable 32IE ( Figure 4.7 ). This directional element is not
voltage polarized and thus a loss-of-potential condition does not disable the
element.
In Figure 5.6 , if setting ELOP = Y1 and LOP asserts, keying and echo keying
in the permissive overreaching transfer trip (POTT) logic are blocked.
NOTE 1:
When global setting VSCONN = 3V0, the various ground-
directional elements that rely on zero-sequence voltage quantities
(ORDER settings V, S, P, and U) are not disabled by a loss-of-potential
condition on relay inputs
VA , VB , and VC , because these directional
elements use the 3V
0
zero-sequence voltage that comes directly from
voltage input
VS
, rather than the zero-sequence voltage calculated from
V
2
negative-sequence voltage (V secondary) {delta-connected PTs}
VNOM PT nominal voltage setting (line-to-neutral, {wye-connected PTs}
or line-to-line {delta-connected PTs}, secondary)
Inputs Description