ROHS MC9S08QE128, Справочное руководство

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Chapter 1 Device Overview
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 23
1.3 System Clock Distribution
Figure 1-2 shows a simplified clock connection diagram. Some modules in the MCU have selectable clock
inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module
function. All memory mapped registers associated with the modules are clocked with BUSCLK. The ICS
supplies the clock sources:
• ICSOUT — This clock source is used as the CPU clock and is divided by 2 to generate the
peripheral bus clock. Control bits in the ICS control registers determine which of three clock
sources is connected:
— Internal reference clock
— External reference clock
— Frequency-locked loop (FLL) output
See Chapter 11, “Internal Clock Source (S08ICSV3) ” for details on configuring the ICSOUT
clock.
• ICSLCLK — This clock source is derived from the digitally controlled oscillator (DCO) of the ICS
when the ICS is configured to run off of the internal or external reference clock. Development tools
can select this internal self-clocked source (~ 8 MHz) to speed up BDC communications in systems
where the bus clock is slow. See
Chapter 11, “Internal Clock Source (S08ICSV3) ” for details.
• ICSERCLK — This is the external reference clock and can be selected as the alternate clock for
the ADC module. The Optional External Reference Clock section in
Chapter 11, “Internal Clock
Source (S08ICSV3) ” explains the ICSERCLK in more detail. See Chapter 10, “Analog-to-Digital
Converter (S08ADC12V1) ” for more information regarding the use of ICSERCLK with these
modules.
• ICSIRCLK — This is the internal reference clock and can be selected as the real-time counter clock
source. The Internal Reference Clock section in
Chapter 11, “Internal Clock Source (S08ICSV3)
explains the ICSERCLK in more detail. See Chapter 13, “Real-Time Counter (S08RTCV1) ” for
more information regarding the use of ICSIRCLK.
• ICSFFCLK — This generates the fixed frequency clock (FFCLK) after being synchronized to the
bus clock. It can be selected as clock source for the TPM modules. The frequency of the
ICSFFCLK is determined by the settings of the ICS. See the Fixed Frequency Clock section in
Chapter 11, “Internal Clock Source (S08ICSV3) ” for details.
• LPOCLK — This clock is generated from an internal low power oscillator that is completely
independent of the ICS module. The LPOCLK can be selected as the clock source to the RTC or
COP modules. See
Chapter 13, “Real-Time Counter (S08RTCV1) ” and Section 5.4, “Computer
Operating Properly (COP) Watchdog ” for details on using the LPOCLK with these modules.
• OSCOUT — This is the direct output of the external oscillator module and can be selected as the
real-time counter clock source. See
Chapter 13, “Real-Time Counter (S08RTCV1) ” for details.
• TPMxCLK — TPMxCLKs are optional external clock sources for the TPM modules. The
TPMxCLK must be limited to 1/4th the frequency of the bus clock for synchronization. See the
External TPM Clock Sources section in
Chapter 16, “Timer/Pulse-Width Modulator (S08TPMV3)
for more details.