Interfaces and Connectors
R&S
®
SFE100
25
Getting Started 2112.4122.62 ─ 13
Table 5-4: Input pin assignment
Pin
Name
Signal
1
DIG_
Data clock 2 (control signal)
2
GND
Ground (control signal)
3
DIG_I
Data bit (LSB), OUT/IN 0 line (I/Q signal)
4
DIG_I
Data bit, OUT/IN 1 line (I/Q signal)
5
DIG_I
Data bit, OUT/IN 2 line (I/Q signal)
6
DIG_IQ_
Data clock 1 (I/Q signal)
7
DIG_IQ_IN_SCLK
Serial clock (control signal)
8
+U5V2
+5
V (control signal)
9
DIG_I
Data bit, OUT/IN 3 line (I/Q signal)
10
DIG_I
Data bit, OUT/IN 4 line (I/Q signal)
11
DIG_I
Data bit, OUT/IN 5 line (I/Q signal)
12
DIG_I
Data bit, OUT/IN 6 line (I/Q signal)
13
DIG_I
Data bit (MSB), OUT/IN 7 line (I/Q signal)
14
DIG_IQ_CLK2-
Data clock 2 (control signal)
15
DIG_IQ_IN_D0-
Data bit (LSB), OUT/IN 0 line (I/Q signal)
16
DIG_IQ_IN_D1-
Data bit, OUT/IN 1 line (I/Q signal)
17
DIG_IQ_IN_D2-
Data bit, OUT/IN 2 line (I/Q signal)
18
DIG_IQ_IN_CLK1-
Data clock 1 (I/Q signal)
19
GND
Ground (control signal)
20
DIG_IQ_IN_SDAT
Serial data (control signal)
21
DIG_IQ_IN_D3-
Data bit, OUT/IN 3 line (I/Q signal)
22
DIG_IQ_IN_D4-
Data bit, OUT/IN 4 line (I/Q signal)
23
DIG_IQ_IN_D5-
Data bit, OUT/IN 5 line (I/Q signal)
24
DIG_IQ_IN_D6-
Data bit, OUT/IN 6 line (I/Q signal)
25
DIG_IQ_IN_D7-
Data bit (MSB), OUT/IN 7 line (I/Q signal)
26
GND
Ground (control signal)
Rear Panel
