Commissioning
TR-Electronic GmbH 2012, All Rights Reserved
Printed in the Federal Republic of Germany
Page 34 of 56
TR - ECE - BA - GB - 0095 - 19
05/30/2018
5.5.1.1 Input data
5.5.1.1.1 Cams
Unsigned16
Byte
X+0
X+1
Bit
15 – 8
7 – 0
Data
2
15
– 2
8
2
7
– 2
0
Bit
Description
2
0
Speed overflow
The bit is set if the speed value is outside the range of –32768…+32767.
2
1
…2
15
reserved
5.5.1.1.2 TR-Status
Unsigned16
Byte
X+2
X+3
Bit
15 – 8
7 – 0
Data
2
15
– 2
8
2
7
– 2
0
Bit
Description
2
0
Preset_Status
The bit is set if the F-Host triggers a preset request. When the preset has
been executed, the bit is automatically reset.
2
1
…2
14
reserved
2
15
Error
The bit is set if a preset request could not be executed due to excessive
speed. The current speed must be in the range of the speed set under
Preset Standstill Tolerance
. The bit is reset after the host has
cleared the variable associated to the control bit 2
0
iPar_EN
, also see
