RadiSys EPC-5A, Справочное руководство по аппаратному и программному обеспечению

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EPC-5A Hardware Reference
G-10
Real Time Clock (RTC): Peripheral circuitry on a computer motherboard which
provides a nonvolatile time-of-day clock, an alarm, calendar, programmable
interrupt, square wave generator, and a small amount of SRAM. In the EPC-
30, the RTC operates independently of the system PLL which generates the
internal system clocks. The RTC typically receives power from a small
battery to retain the current time of day when the computer is powered down.
Reflashing: The process of replacing a BIOS image, in binary format, in the flash
boot device.
Register: An area typically inside the microprocessor where data, addresses,
instruction codes, and information on the status on various microprocessor
operations are stored. Different types of registers store different types of
information.
Register Location: A set up value in the EPC-30 BIOS which defines the base
location at which the configuration register block in an ATA PC card may be
found.
Reset: A signal delivered to the microprocessor by the control bus, which causes a
halt to internal processing and resets most CPU registers to 0. The CPU then
jumps to a starting address vector to begin the boot process.
Resident Flash Array (RFA): The RFA represents flash memory that is resident on
the hardware platform that is utilized for OS or application purposes.
RS-232: A popular asynchronous bi-directional serial communication protocol.
Among other things, the RS-232 standard defines the interface cabling and
electrical characteristics, and the pin arrangement for cable connectors.
Row Address Strobe (RAS): An input signal to an internal DRAM latch register
specifying the row at which to read or write data. The DRAM requires a row
address and a column address to define a memory address. Since both parts
of the address are applied at the same DRAM inputs, use of row addresses
and column addresses in a multiplexed array allows use of half as many pins
to define an address location in a DRAM device as would otherwise be
required.
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S
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Segment: A section or portion of addressable memory serving to hold code, data,
stack, or other information allowing more efficient memory usage in a
computer system. A segment is the portion of a real mode address which
specifies the fixed base address to which the offset is applied.