PT AMC123, Руководство пользователя

Страница: 25 / 104

AMC123 Functional Blocks
25
• Intel Architecture Processor
– Low-power and high-performance architecture based on Intel Architecture (IA-32) processor
– Three operating frequency SKUs: - 600 MHz, 1066 MHz, or 1200 MHz
– Internal 400 or 533 MHz FSB interface
– 256 KB two-way level 2 cache (L2)
• Integrated Memory Control Hub (IMCH) and Integrated I/O Control Hub (IICH) Compatible. The IMCH
provides the main path to memory for the IA-32 core and all peripherals that perform coherent I/O
(e.g. PCI Express, the IICH to coherent memory).
– Enhanced DMA (EDMA) controller
– Two SATA (Gen1 or Gen2) interfaces
– Two USB 2.0 ports
– Two 16550-compatible UARTs
– One LPC 1.1 interface
– One Serial Peripheral Interface (SPI) boot interface
– Two SMBus/I
2
C interfaces
– 36 General Purpose I/O (GPIO) ports
– Watchdog Timer
– One 32/64-bit and two 32-bit high-precision event timers
• Single-Channel DDR SDRAM Memory
– Supports DDR2 at 400/533/667/800 MT/s
– Supports 32 or 64-bit interfaces
– Error correction code (ECC); single-bit correct/double-bit detect (SEC/DED) coverage
– Addressable from Intel architecture processor and PCI Express
• Three Gigabit Ethernet MACs
– Three 10/100/1000 ports with RGMII/RMII interfaces
– Management Data Input/Output (MDIO) interface for external PHY configuration
– Serial EEPROM interface supports network boot and wake-on LAN
• Industry Standard PCI Express Interface
– Supports 1x8, 2x4, or 2x1 configurations as a root complex
• Integrated SATA Host Controllers
– Independent DMA operation on two ports
– Data transfer rates up to 3.0 Gb/s
– Alternate Device ID
• Local Expansion Bus (LEB)
– Supports up to eight chip select external slaves (one of which can be a master)
– 25-bit address and 16-bit data
• Two CAN 2.0b interfaces
• One Synchronous Serial Port (SSP)
• IEEE 1588-2008 Hardware Assistance
– Real-time network synchronization on two GbE and two CAN interfaces
– Time master/target support
• Integrated real-time clock (RTC) support
See “Processor,” on page 103 for links to additional information for this device.