PLX Technology PEX 8624-AA RDK, Справочник по аппаратуре

Страница: 9 / 46

PEX 8624-AA RDK Hardware Reference Manual – Version 1.1
Copyright © 2010 by PLX Technology, Inc. All rights reserved
3
o
IEEE Standard 1149.1a-1993, IEEE Standard Test Access Port and Boundary-Scan Architecture
o
IEEE Standard 1149.1-1994, Specifications for Vendor-Specific Extensions
o
IEEE Standard 1149.6-2003, IEEE Standard Test Access Port and Boundary-Scan Architecture
Extensions (IEEE Standard 1149.6-2003)
o
The I
2
C-Bus Specification, Version 2.1 (I
2
C Bus v2.1)
1.2 PEX 8624-AA RDK Features

PLX PEX 8624 PCI Express switch in a 324-ball Flip-Chip Plastic BGA package

Form factor based on PCI Express Card Electromechanical (CEM) Specification 2.0

Ships with default configuration of three x8 Ports
o
All PEX 8624 lane/port configurations supported with breakout boards and configuration modules

Non-Transparent Bridging support

Two x8 Gen 2 Midbus probe footprints for one upstream and one downstream port PCI Express signal
probing

On-board PCI Express RefClk buffer which supports Spread Spectrum Clocking

Parallel Hot-Plug and Serial Hot-Plug circuits

Socketable Serial EEPROM (2.5V)

Two standard 2x2 headers provides the I
2
C interface to an I
2
C master

DIP switches for port configuration, upstream port or NT port select and I
2
C address settings

Manual push-button PERST# capability

Up to six Lane Status indicator LEDs for visual inspection of link speed and status

Voltage level monitoring circuit for 1.0V and 2.5V power to the PEX 8624