PEX 8624-AA RDK Hardware Reference Manual – Version 1.1
Copyright © 2010 by PLX Technology, Inc. All rights reserved
10
x4
Figure 2-7. PEX 8624-AA RDK SERIAL HOT-PLUG Circuits
The serial hot-plug controller consists of an I/O expander (MAX 7311 (U3)), a dual hot–swap power controller
(TPS2311 (U4)), a quad 2-to-1 multiplexer (SN74LVC157 (U5)), two power MOSFET IRF7470 (Q1 and Q2),
LEDs, manual switch, dipswitches and resistors. The PEX 8624 master I
2
C interface is designed for the specific
control use of the serial hot-plug controller. The master I
2
C interface connected to the I/O expander and the
interrupt output from the I/O expander connects to the SERIAL HOT-PLUGC_INT# of the PEX 8624. When power
is applied to the PEX 8624, the master I
2
C interface will scan the bus and attempts to detect the presence of the
I/O expander. If an I/O expander is detected, the I
2
C master will program it as a “remote parallel hot-plug
controller” and assign an available serial hot-plug port to the I/O expander. (see Section
2.5.1
,
Figure 2-6
and
Figure 2-7
for details).
The RDK also provides dipswitches for setting the SLTID [3:0], a test point for access the GPIO pin, and three
pull-down resistors to set AD [2:0] of the I/O expander U3. The LEDs D1 and D2 are 12V and 3.3V power
indicators when power reaches PCI Express connector SLOT 2.
2.6 Serial
EEPROM
The PEX 8624-AA RDK contains an 8-pin DIP socket for a serial EEPROM (U17). The board is populated with a
blank On Semi CAT25080LI-G 32-Kbit device. The CAT25080LI-G device can directly interface to the PEX8624.
When programmed correctly, the serial EEPROM can be used to change the default configuration of the PEX
8624. A blank EEPROM results in the default register values set in the PEX 8624. Please refer to the Software
Development Kit (SDK) documentation for additional information on how to program the serial EEPROM.
2.7 I
2
C Interface
The PEX 8624 implements an I
2
C slave interface (I
2
C port 0), which allows an external I
2
C master to read and
write device registers through an out-of-band mechanism. The PEX 8624 I
2
C interface is accessible via a 7-bit
address, at data rates from 100 Kbps up to 3.4 Mbps. The RDK provides two cascaded 2x2, 0.1” pitch headers
(JP5 and JP6), which interface to the PEX 8624’s I
2
C port. That allows for cascading multiple RDKs together
using standard ribbon cable, and/or connecting to an I
2
C master such as the Total Phase Aardvark I
2
C controller.
(See Section
3.6
for pin assignment of JP5 and JP6.)
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