VSX-74TXVi
255
5
6
7
8
5
6
7
8
C
D
F
A
B
E
No.
Mark
Pin Name
I/O
Pin Function
51
P41/A17
A17
O
Address output of FLASH MEMORY communication
52
P40/A16
A16
O
Address output of FLASH MEMORY communication
53
P37/A15
A15
O
Address output of FLASH MEMORY communication
54
P36/A14
A14
O
Address output of FLASH MEMORY communication
55
P35/A13
A13
O
Address output of FLASH MEMORY communication
56
P34/A12
A12
O
Address output of FLASH MEMORY communication
57
P33/A11
A11
O
Address output of FLASH MEMORY communication
58
P32/A10
A10
O
Address output of FLASH MEMORY communication
59
P31/A9
A9
O
Address output of FLASH MEMORY communication
60
Vcc2
Vcc
−
Power supply
61
P30/A8(/_/D7)
A8
O
Address output of FLASH MEMORY communication
62
Vss
Vss
−
Ground
63
P27/AN27/A7(/D7/D6)
A7
O
Address output of FLASH MEMORY communication
64
P26/AN26/A6(/D6/D5)
A6
O
Address output of FLASH MEMORY communication
65
P25/AN25/A5(/D5/D4)
A5
O
Address output of FLASH MEMORY communication
66
P24/AN24/A4(/D4/D3)
A4
O
Address output of FLASH MEMORY communication
67
P23/AN23/A3(/D3/D2)
A3
O
Address output of FLASH MEMORY communication
68
P22/AN22/A2(/D2/D1)
A2
O
Address output of FLASH MEMORY communication
69
P21/AN21/A1(/D1/D0)
A1
O
Address output of FLASH MEMORY communication
70
P20/AN20/A0(/D0/_)
A0
I
Do not connect at 16bit data access
71
P17/D15/INT5
D15
I
Data input/output of FLASH MEMORY communication
72
P16/D14/INT4
D14
I
Data input/output of FLASH MEMORY communication
73
P15/D13/INT3
D13
I
Data input/output of FLASH MEMORY communication
74
P14/D12
D12
I
Data input/output of FLASH MEMORY communication
75
P13/D11
D11
I
Data input/output of FLASH MEMORY communication
76
P12/D10
D10
I
Data input/output of FLASH MEMORY communication
77
P11/D9
D9
I
Data input/output of FLASH MEMORY communication
78
P10/D8
D8
I
Data input/output of FLASH MEMORY communication
79
P07/AN07/D7
D7
I
Data input/output of FLASH MEMORY communication
80
P06/AN06/D6
D6
I
Data input/output of FLASH MEMORY communication
81
P05/AN05/D5
D5
I
Data input/output of FLASH MEMORY communication
82
P04/AN04/D4
D4
I
Data input/output of FLASH MEMORY communication
83
P03/AN03/D3
D3
I
Data input/output of FLASH MEMORY communication
84
P02/AN02/D2
D2
I
Data input/output of FLASH MEMORY communication
85
P01/AN01/D1
D1
I
Data input/output of FLASH MEMORY communication
86
P00/AN00/D0
D0
I
Data input/output of FLASH MEMORY communication
87
P107/AN7/KI3
XDARST
I
DAC reset
88
P106/AN6/KI2
XM CSEL(IREQ3)
I
XM information (Control with the main microcomputer information)(3rd DSP FLAG0 input)
89
P105/AN5/KI1
IRQ1
I
1st DSP FLAG0 input
90
P104/AN4/KI0
DSP1 CS
I
1st DSP chip select
91
P103/AN3
ROWE
I
For DSP rewriting control
92
P102/AN2
MOT_MODE
I
For the Motorola operating state control
93
P101/AN1
MODEL
I
For model distinction (A/D input use)
94
AVSS
Avss
−
Ground
95
P100/AN0
DSPMUTE
I
DSP MUTE control output
96
VREF
Vref
−
Reference voltage
97
AVcc
Avcc
−
Power supply
98
P97/ADTRG/SIN4
DSP2MISO/DSP CDIN
I
DSP communication data input of Motorola/SHARC
99
P96/ANEX1/SOUT4
DSP2MOSI/DSP CDOUT
I
DSP communication data output of Motorola/SHARC
100 P95/ANEX0/CLK4
DSP2SCK/DSP CCLK
I
DSP communication clock output of Motorola/SHARC