Phytec phyCORE-ADuC812, Быстрый старт

Страница: 60 / 86

phyCORE-ADuC812 QuickStart Instructions
56
© PHYTEC Meßtechnik GmbH 2002 L-462e_2
•
Open the Project|Options for Target ‘phyCORE-ADuC812’ menu
and change the default settings to the correct values as shown in
the figure below. This includes settings for the clock frequency of
your phyCORE module, the memory model (make sure
“Large: variables in XDATA” is configured) and the off-chip
memory
7
.
The memory ranges for off-chip CODE and off-chip XDATA
memory are configured to fit within the von Neuman memory space
as configured by the the Keil mon51.hex monitor file (refer to
Figure 5). In addition, the restrictions for the off-chip CODE memory
start address in the evaluation version of the Keil tool chain must be
considered. The start address of the XDATA memory should be at
0x100 in order to avoid conflicts with the interrupt/reset vector table
which is located between 0x0 and 0xFF.
7
Ensure that the CODE and XDATA memory do not overlap.
Note: When using the evaluation version of the Keil tool chain, the start address of the CODE
memory must be at 0x4000 or higher. When using the full version of the Keil tool chain, the
start address of the CODE memory should be at 0x100. This avoids conflicts with the
interrupt/reset vector table which is located between 0x0 and 0xFF. The XDATA memory can
then be located in a higher address range. Again, ensure that the CODE and XDATA memory
do not overlap.