Philips Semiconductors
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TDA1562Q application note
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© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Application note
Rev. 01.02 — 05 May 2006
15 of 62
mute to operating before the input capacitors are fully muted, a large DC offset will
appear between the two outputs causing a very loud plop.
With 220 nF input capacitors the mute time should be approximately 200 ms. With larger
input capacitors, the mute time should be prolonged accordingly. For 470 nF input
capacitors, a mute time during switch on of at least 500 ms should be used.
The best way to mute the amplifier during switching on is by keeping the mode select pin
at a level between 2 and 3 V and keeping the status I/O pin low. Then, when enough
time has passed for the input capacitors to be biased, the status I/O pin should be
released first and then the voltage at the mode select pin can be increased to 4V or
higher.
Releasing the mute by means of the mode select pin will ensure that the mute to
operating transient is as quiet as possible since this way the amplifier is enabled when
the signal crosses 0V.
Summarizing:
Table 2:
Switch-on sequence for best plop performance
Stand-by
Stand- by to
mute
Mute
Mute to
operating
Mode select pin
Low (0V)
0V to 3V
3V for 200ms
(dependent on
input capacitors)
Increase voltage
gradually from 3V
to above 4.5V
after Status I/O is
released.
Status I/O pin
Low (0V
Low (0V)
Low (0V)
Release : floating
When the amplifier is switched off, it should be muted as fast as possible, in order to
minimize the risk of switching noise from circuits in front of the amplifier being amplified.
So unless these circuits are switched off later, here it would be best to use the status I/O
pin to mute the amplifier.
The optimum switch-off sequence is as follows:
Table 3:
Switch-off sequence
Operating
Operating to stand-by
Mode select pin
V
mode
> 4.5V
Pull down to 2V rapidly, then down to 0V slowly
Status I/O pin
Floating
Pull down to 0V rapidly
During engine starts, the Supply voltage may drop to values below 5V. The TDA1562Q is
equipped with a so-called “Low Vp Mute circuit” which will mute the amplifier when the
supply voltage drops to values below 7V, the amplifier will be automatically muted.
When the supply voltage drops very rapidly, the negative terminals of the lifter
capacitors will be pulled down and the voltage at these pins can become lower
than the substrate voltage, this may cause plops.
As long as the amplifier is muted, an internal circuit will prevent the negative terminals of
the lifter capacitors from being pulled below substrate level.