Circuit Diagrams and PWB Layouts
10.
SSB: FPGA WOW - I/O Banks
VCCD_PLL4
VCCA4
GNDA4
VCCD_PLL
3
GNDA
3
CE
CONFIG
DCLK
S
TATU
S
TCK
TDI
TDO
TM
S
VCCA
3
GND
GND
GND
GND
GND
GND
GND
GND
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCIO6
VCCIO1
VCCIO
8
VCCIO5
VCCIO2
VCCIO4
VCCIO7
VCCIO
3
VCCD_PLL1
VCCA1
GNDA1
VCCD_PLL2
VCCA2
CONF_DONE
M
S
EL0
M
S
EL1
M
S
EL2
M
S
EL
3
GNDA2
C
8
10
i
s
prohi
b
ited witho
u
t the written con
s
ent of the copyright
2
3
16
15
20
1
D
4
5
6
7
A
P
D
15
2
17
N
D
6
2
G
F
C
14
4
2
3
4
5
1
F
G
H
2F4
3
E7
E
2FN7 D1
3
17
9
1
8
F
16
All right
s
re
s
erved. Reprod
u
ction in whole or in p
a
rt
s
1
8
4
M
14
15
A
B
J
J
I
14
12
L
20
C
3
M
K
9FN7 E4
12
3
F74-2 B4
2FN0 D9
2FN1 D9
2FN2 D9
2FN
3
D9
2FN5 D12
2FN6 D1
3
12
1
3
B
9
1
1
1
3
19
G
1
3
K
IFN9 B1
3
IFNA B15
7FN0-2 A6
7FN0-
3
A10
7FN0-4 A1
3
8
9
10
11
12
1
3
A
B
C
E
3
N
11
8
E
H
7
owner.
15
5
IFNN D5
9FN
8
D5
9FN9 D7
9FNA D7
9FNB D7
9FNC E7
6
7
8
9
10
11
3
FNG E7
7FN0-1 A
3
7FN0-10 F11
14
11
O
H
6
10
B
7
A
O
P
19
IFN4 B9
IFN5 B9
IFN6 B11
IFN7 B11
IFN
8
B1
3
C
D
E
F
G
H
9FN1 D4
9FN4 E4
9FN6 E4
9FN0 D4
IFNB B15
IFNC D1
3
IFND E11
IFNF D7
IFNG D5
IFNH D
3
IFNJ D
3
IFNK D4
IFNL D4
IFNM D5
I
5
FPGA WOW - IO-BANK
S
L
9FND C9
FF1
8
A1
FF19 B1
FF4
8
B1
IFN0 A2
3
F74-
3
B2
3
F74-4 B5
3
FN1 A1
3
FN2 B1
3
FN
3
B1
3
FNF E7
IFN1 A4
IFN2 B
8
IFN
3
B
8
7FN0-5 C1
7FN0-6 C5
7FN0-7 C10
7FN0-
8
C1
3
7FN0-9 E4
+1V2-FPGA
9FN1
+2V5o
u
t-FPGA
+2V5-PLL
1n0
2FN2
+1V2-FPGA
+2V5-DDR1
+2V5in-FPGA
R16
R17
IO_R17|VREFB5N2
R1
8
IO_R1
8
|VREFB5N
3
T16
IO_T16|RUP
3
T17
IO_T17|R54N
T1
8
IO_T1
8
N14
P15
L1
8
M14
IO_M14|R
38
N
M17
IO_M17|R
33
N
M1
8
IO_M1
8
|R
3
2N|DEV_OE
N15
IO_N15|R55P
N16
IO_N16|VREFB5N1
P17
IO_P17|R42P
P1
8
IO_P1
8
|R42N
IO_R16|RDN
3
P14
K17
IO_K17|R29P
K1
8
IO_K1
8
|R29N
L1
3
IO_L1
3
|R
38
P
L14
IO_L14|R
3
6P
L15
IO_L15|R
3
6N
L16
IO_L16|R
33
P
L17
IO_L17|R
3
2P|DEV_CLR_
IO_L1
8
|VREFB5N0
BANK5
EP
3
C40F
3
24C7N
7FN0-5
N17
CLK6|CLK_
3
P
N1
8
CLK7|CLK_
3
N
+1V2-FPGA
+1V2-FPGA
+1V2-FPGA
+1V2-PLL
IFNL
+
3
V
3
-FPGA
IFN5
T7
T9
C1
3
T10
T12
T15
C15
E
3
E16
F7
M1
3
M16
C11
N
3
N6
N
8
N10
N12
P
3
P16
T5
K
8
K9
C
8
K10
K11
K16
L
8
L9
L10
L11
M10
H10
C6
H11
J
3
J
8
J9
J10
J11
J16
K
3
C4
F9
F11
F1
3
G
3
G6
G9
G16
H
8
H9
GND
EP
3
C40F
3
24C7N
7FN0-10
F5
+2V5-DDR1
+2V5-DDR1
H1
IO_H1|VREFB1N
3
H2
IO_H2
H
3
IO_H
3
|DATA0
H6
IO_H6|VREFB1N2
G5
J1
J6
J5
J2
E4
D1
IO_D1|L
8
N|DATA1|A
S
DO
D2
IO_D2|L
8
P
D
3
IO_D
3
|L7P
E1
IO_E1|L10N
E2
IO_E2|L10P|FLA
S
H_CE_|C
S
O_
F
3
IO_F
3
|VREFB1N1
G1
IO_G1|L20N
G2
IO_G2|L20P
CLK1|CLK_0N
H5
H4
E5
B1
IO_B1|L1N
B2
IO_B2|L1P
C1
IO_C1|L
3
N
C2
IO_C2|VREFB1N0
C
3
IO_C
3
|L4P|RE
S
ET_
BANK1
EP
3
C40F
3
24C7N
7FN0-1
K6
F2
CLK0|CLK_0P
F1
4
5
+1V2-FPGA
47R
3
F74-4
D11
D1
3
D15
D4
D6
D
8
+1V2-FPGA
R9
R10
R12
R14
K15
M15
R15
F16
G15
J15
G12
G1
3
G7
F4
G4
J4
K4
M4
N4
R6
R7
M7
M
8
M9
N11
N1
3
N7
N9
F6
F
8
G10
G11
J12
J7
K12
K7
L12
L7
M11
F12
M12
M6
VCC
EP
3
C40F
3
24C7N
7FN0-9
F10
G
8
H12
H7
1n0
2F4
3
9FN0
R
E
S
+2V5o
u
t-FPGA
+
3
V
3
-FPGA
47R
3
F74-2
2
7
+1V2-FPGA
+
3
V
3
-FPGA
IFN6
+2V5o
u
t-FPGA
2FN1
1n0
+2V5-DDR1
+1V2-FPGA
IFN9
1n0
2FN7
+1V2-FPGA
IFNH
+1V2-FPGA
2FN
3
1n0
RE
S
IFNM
+1V2-PLL
9FNA
+1V2-FPGA
+2V5o
u
t-FPGA
1K0
3
FN1
IO_V1
3
|B
3
2N
V1
3
IO_V14|B
3
4N
V14
IO_V15|B
3
5N
V15
IO_V16|B44N
V16
IO_V17|B47N
V17
IO_V1
8
|PLL4_CLKOUTN
V1
8
IO_U1
3
|B
3
2P
U1
3
IO_U14|B
3
4P
U14
IO_U15|B
3
5P
U15
IO_U16|VREFB4N1
U16
IO_U17|B47P
U17
IO_U1
8
|PLL4_CLKOUTP
U1
8
IO_V11|B2
8
N
V11
IO_V12|VREFB4N
3
V12
IO_P1
3
|VREFB4N0
P1
3
IO_R11|B
3
6N
R11
IO_R1
3
|B4
8
N
R1
3
IO_T11|VREFB4N2
T11
IO_T1
3
|RUP2
T1
3
IO_T14|RDN2
T14
IO_U11|B2
8
P
U11
IO_U12|B29P
U12
7FN0-4
EP
3
C40F
3
24C7N
BANK4
CLK12|CLK_7N
V10
CLK1
3
|CLK_7P
U10
IO_P10|B
33
P
P10
IO_P11|B
33
N
P11
IO_P12
P12
+1V2-FPGA
9FN4
+
3
V
3
-FPGA
+1V2-FPGA
FF1
8
+
3
V
3
-FPGA
+1V2-FPGA
VREF-FPGA1
P4
R2
IO_R2|L45P
R
3
IO_R
3
|L52N
R4
IO_R4
R5
IO_R5|VREFB2N
3
T1
IO_T1|RDN1
T2
IO_T2|RUP1
T
3
IO_T
3
|L52P
N5
L6
IO_L6|VREFB2N0
M1
IO_M1|L
3
4N
M2
IO_M2|L
3
4P
M
3
IO_M
3
|VREFB2N1
M5
IO_M5
P1
IO_P1|L44N
P2
IO_P2|L44P
R1
IO_R1|VREFB2N2
K1
IO_K1|L26N
K2
IO_K2|L26P
K5
IO_K5|L2
8
P
L1
IO_L1|L
3
2N
L2
IO_L2|L
3
2P
L
3
IO_L
3
|L
33
N
L4
IO_L4|L
33
P
L5
IO_L5|L2
8
N
BANK2
EP
3
C40F
3
24C7N
7FN0-2
N2
CLK2|CLK_1P
N1
CLK
3
|CLK_1N
P5
+1V2-PLL
IFN1
IFN7
+1V2-FPGA
+1V2-FPGA
IFNJ
IO_D9|T24P|PADD17
D9
IO_E10|T25P|PADD15
E10
IO_E6|VREFB
8
N
3
E6
IO_E7|T5N|DATA9
E7
IO_E
8
|T
8
P|DATA6
E
8
IO_E9|VREFB
8
N0
E9
IO_B6|T1
8
P|DATA15
B6
IO_B7|T19P|DATA4
B7
IO_B
8
|T20P|DATA
3
B
8
IO_C5|T11P|DATA5
C5
IO_C7|VREFB
8
N1
C7
IO_C9|T24N|PADD16
C9
IO_D5|T
3
P|DATA12
D5
IO_D7|VREFB
8
N2
D7
IO_A4|T7N|DATA7
A4
IO_A5|T16N|DATA14
A5
IO_A6|T1
8
N|PADD19
A6
IO_A7|T19N|PADD1
8
A7
IO_A
8
|T20N|DATA2
A
8
IO_B
3
|T4P|DATA11
B
3
IO_B4|T6P|DATA
8
B4
IO_B5|T16P|DATA1
3
B5
BANK
8
EP
3
C40F
3
24C7N
7FN0-
8
CLK10|CLK_4N
A9
CLK11|CLK_4P
B9
IO_A1|PLL
3
_CLKOUTN
A1
IO_A2|PLL
3
_CLKOUTP
A2
IO_A
3
|T4N|DATA10
A
3
VREF-FPGA1
IFN
8
3
FN
3
10K
RE
S
VREF-FPGA1
+1V2-FPGA
9FN9
+
3
V
3
-FPGA
VREF-FPGA1
+2V5in-FPGA
FF4
8
RE
S
E12
IO_E12|T45P|PADD0
E1
3
IO_E1
3
|RDN4
E14
IO_E14|RUP4
+2V5-PLL
9FNB
C12
IO_C12|VREFB7N2
C14
IO_C14|PLL2_CLKOUTN
C16
IO_C16|T49N
D10
IO_D10|T27P|PADD14
D12
IO_D12|VREFB7N1
D14
IO_D14|PLL2_CLKOUTP
D16
IO_D16|T49P
E11
IO_E11|VREFB7N
3
A1
8
IO_A1
8
|T4
8
P
B11
IO_B11|T29P|PADD12
B12
IO_B12|T
3
1P|PADD10
B1
3
IO_B1
3
|T
3
5P|PADD
8
B14
IO_B14|T
3
6P|PADD6
B15
IO_B15|T
3
7P|PADD4
B16
IO_B16|T41P|PADD2
C10
IO_C10|T27N|PADD1
3
B10
CLK9|CLK_5P
A11
IO_A11|T29N|PADD11
A12
IO_A12|T
3
1N|PADD9
A1
3
IO_A1
3
|T
3
5N|PADD7
A14
IO_A14|T
3
6N|PADD5
A15
IO_A15|T
38
N|PADD
3
A16
IO_A16|T41N|PADD1
A17
IO_A17|VREFB7N0
BANK7
EP
3
C40F
3
24C7N
7FN0-7
A10
CLK
8
|CLK_5N
+2V5in-FPGA
V
3
IO_V4|B17N
V4
IO_V5|B1
8
N
V5
IO_V6|B24N
V6
IO_V7|B26N
V7
IO_V
8
|B27N
V
8
IO_U4|B17P
U4
IO_U5|B1
8
P
U5
IO_U6|B24P
U6
IO_U7|B26P
U7
IO_U
8
|B27P
U
8
IO_V1|B1N
V1
IO_V2|PLL1_CLKOUTN
V2
IO_V
3
|B16N
IO_P9|B2
3
N
P9
IO_R
8
|B21P
R
8
IO_T4|VREFB
3
N
3
T4
IO_T6|VREFB
3
N2
T6
IO_T
8
|B21N
T
8
IO_U1|B1P
U1
IO_U2|PLL1_CLKOUTP
U2
IO_U
3
|B16P
U
3
7FN0-
3
EP
3
C40F
3
24C7N
BANK
3
CLK14|CLK_6N
V9
CLK15|CLK_6P
U9
IO_P6|B6P
P6
IO_P7|VREFB
3
N1
P7
IO_P
8
|VREFB
3
N0
P
8
VREF-FPGA1
+1V2-FPGA
RE
S
9FND
IFN4
2FN6
1n0
+1V2-FPGA
IFNN
IFN0
FF19
+2V5in-FPGA
9FN7
10K
3
FN2
VREF-FPGA1
9FN
8
+2V5-DDR1
9FNC
RE
S
E15
+2V5in-FPGA
IFNC
H16
IO_H16|R2
3
N
H17
IO_H17|R2
8
P
H1
8
IO_H1
8
|VREFB6N2
J1
3
IO_J1
3
|VREFB6N
3
K1
3
J1
8
J17
J14
F14
E17
IO_E17|R24P|CLKU
S
R
E1
8
IO_E1
8
|R24N|CEO_
G14
IO_G14|R7N|PADD2
3
G17
IO_G17|R27P|CRC_ERROR
G1
8
IO_G1
8
|R27N|INIT_DONE
H1
3
IO_H1
3
|R
8
P|RDY
H14
IO_H14|R
8
N|AVD_
H15
IO_H15|VREFB6N1
F1
8
CLK5|CLK_2N
K14
F15
B17
IO_B17|VREFB6N0
B1
8
IO_B1
8
|R4N|PADD20
C17
IO_C17|R5P|PADD21
C1
8
IO_C1
8
|R5N|PADD22
D17
IO_D17|R12P|OE_
D1
8
IO_D1
8
|R12N|WE_
BANK6
EP
3
C40F
3
24C7N
7FN0-6
F17
CLK4|CLK_2P
+2V5o
u
t-FPGA
VREF-FPGA1
+2V5in-FPGA
+
3
V
3
-FPGA
+1V2-FPGA
+1V2-FPGA
+1V2-FPGA
IFND
IFN2
IFNA
+
3
V
3
-FPGA
IFNF
1n0
2FN0
+1V2-FPGA
+1V2-FPGA
+1V2-PLL
IFNK
1n0
2FN5
IFN
3
VREF-FPGA1
+2V5o
u
t-FPGA
+2V5-PLL
+2V5-DDR1
IFNG
+1V2-FPGA
+1V2-FPGA
100R
3
FNG
+
3
V
3
-FPGA
47R
3
F74-
3
3
6
+1V2-FPGA
IFNB
100R
3
FNF
TV54
3
R2 LDIPNX
FPGA WOW - IO-BANK
S
A2
1
3
0
3
200
8
-10-10
M
a
elegheer Ingrid
200
8
-11-21
ROYAL PHILIP
S
ELECTRONIC
S
N.V. 2007
2007-12-06
7
8
S
ETNAME
CHN
CLA
SS
_NO
S
UPER
S
.
2
NAME
DATE
CHECK
8
204 000
8
9
33
9FN6
nC
S
O
n
S
TATU
S
M
S
EL2
M
S
EL1
M
S
EL
3
+2V5-PLL
TX
8
51CLK-
TX
8
51CLK+
CLK-OUT2-PNX5100
CLK-OUT-PNX5100
TX
8
51B+
TX
8
51B-
MM1-A2
MM1-A4
A
S
DO
TX
8
51D-
TX
8
51B+
TX
8
51C+
TX
8
51A-
TX
8
51A+
TX
8
51D+
TX
8
51E-
TX
8
51E+
TX
8
51C-
DCLK
nCONFIG
nCE
M
S
EL0
CLK-OUT2-PNX5100
S
CL-AMBI-
3
V
3
S
DA-AMBI-
3
V
3
BACKLIGHT-OUT
BACKLIGHT-CONTROL-FPGA-IN
S
DA-
SS
B
S
CL-
SS
B
TDO
TM
S
nCE
nCONFIG
n
S
TATU
S
TCK
TDI
MM1-D15
MM1-D11
MM1-A5
MM1-D9
MM1-D14
MM1-A
8
MM1-DQ
S
0
MM1-A6
MM1-DQ
S
1
MM1-D10
MM1-D12
MM1-D1
3
MM1-A12
MM1-A11
MM1-A9
MM1-A7
MM1-BA1
MM1-BA0
MM1-CLK-
MM1-CLK+
MM1-CKE
MM1-D
8
MM1-D4
MM1-RA
S
MM1-D6
MM1-A
3
MM1-WE
MM1-A1
MM1-D0
MM1-D
3
MM1-D5
MM1-CA
S
MM1-D7
MM1-A0
MM1-A10
MM1-D2
CON22
CON21
CON20
MM1-D1
MM1-C
S
0
TX
8
52D-
TX
8
52C-
TX
8
52B-
TX
8
52A-
CONF-DONE
BACKLIGHT-OUT2
CON27
CON26
CON2
3
TX
8
52E+
TX
8
52D+
TX
8
52C+
TX
8
52B+
TX
8
52A+
TX
8
52E-
TXF2C-
TXF2CLK-
TXF2D-
TXF2E-
TX
8
52CLK-
TX
8
52CLK+
TXF2B+
TXF2C+
TXF2D+
TXF2E+
TXF2A-
TXF2B-
TXF1C+
TXF1CLK-
TXF1D-
TXF1D+
TXF1E-
TXF1E+
TXF2A+
DATA0
TXF1A-
TXF1A+
TXF1B-
TXF1B+
TXF1C-
1
83
20_5
33
_09072
8
.ep
s
09072
8