Circuit Diagrams and PWB Layouts
10.
SSB: PNX5100 - Control
S
CL
ADR
0
1
2
S
DA
WC
TDI
TDO
RE
S
ET_
S
Y
S
S
DA
S
CL
S
DA
S
CL
RX
TX
RX
TX
XTAL
UA1
UA2
1
2
TM
S
TR
S
T
NC
RE
S
ET_IN
OUT2
OUT
IN
VPP_ID
OB
S
ERVE
TCK
C
FCD9 D5
FCD1 B
3
FCD
3
B
3
FCD4 B
3
D
C0
8
OR C16
3
CDB D7
2CD1 A2
3
CD2 C2
owner.
D
C
6
F
3
CD
3
B2
A
2CD0 A2
1
J
All right
s
re
s
erved. Reprod
u
ction in whole or in p
a
rt
s
5
B
1
3
10
E
7
G
11
4
8
9
H
1CD0 A2
3
C40 C1
G
1
7C00-1 A
3
7CD0 C4
6
5
5
C
D
D
10
3
CDD D6
1
H
FCD6 D5
6
A
4
3
CDA B5
B
C
F
3
CD1-2 C2
3
CD1-
3
C2
9CD0 D7
8
2
3
ICD
8
B
3
3
CD1-4 C1
PNX5100 : CONTROL
5
i
s
prohi
b
ited witho
u
t the written con
s
ent of the copyright
3
9
FCD2 B
3
3
CDC D6
6
7
2
1
J
4
7
7
3
2
I
2
3
CD0 B2
12
1
3
3
CD1-1 C2
A
3
CD9 B5
B
only for DEBUG
3
CD7 B5
3
CD
8
B5
FCD0 B
3
A
3
4
+
3
V
3
12
11
I
FCD
8
B
3
E
C
B
27M
1CD0
ICD
8
+
3
V
3
2CD0
27p
FCD0
+
3
V
3
+
3
V
3
4K7
3
CDB
FCD4
FCD9
3
CD2
10K
100R
3
CD
8
FCD1
+
3
V
3
+
3
V
3
100R
3
CD0
J2
AF
8
AE
8
AD
8
AC
8
AB21
AE1
3
AF1
3
AF14
AF24
AD12
K2
L2
K1
L1
H4
H2
H
3
J1
G22
H22
W22
Y22
R1
3
CDC
PNX5100E
7C00-1
Φ
CONTROL
10K
100R
3
CD1-
3
3
CD7
100R
+
3
V
3
FCD2
27p
2CD1
2
3
6
5
8
4
7
(2Kx
8
)
Φ
EEPROM
7CD0
M24C16-WDW6
1
FCD
8
100R
3
CDA
RE
S
10K
3
CD1-1
3
CD
3
10K
3
CD1-2
10K
10K
3
CD1-4
10K
+
3
V
3
3
C40
3
CDD
100R
9CD0
DATE
NAME
2
S
UPER
S
.
CLA
SS
_NO
E
M
A
N
T
E
S
N
H
C
9
6
ROYAL PHILIP
S
ELECTRONIC
S
N.V. 200
8
200
8
-11-21
M
a
elegheer Ingrid
200
8
-10-10
3
1
3
0
A
3
CONTROL PNX5100
TV54
3
R2 LDIPNX
8
204 000
8
92
8
CHECK
FCD6
FCD
3
3
CD9
100R
RE
S
S
DA-AMBI-
3
V
3
EJTAG-PNX5100-TDO
EJTAG-PNX5100-TCK
RE
S
ET-PNX5100
PNX5100-R
S
T-OUT
EJTAG-PNX5100-TR
S
Tn
CLK-OUT-PNX5100
EJTAG-PNX5100-TDI
EJTAG-PNX5100-TM
S
S
CL-
SS
B
WC-EEPROM-PNX5100
S
CL-
SS
B
S
DA-
SS
B
WC-EEPROM-PNX5100
S
DA-
SS
B
S
CL-AMBI-
3
V
3
1
83
20_52
3
_09072
8
.ep
s
09072
8