IORD-Instruction
Section 4-4
80
The Data Transfer Busy bit (CIO n+17, bit 02) is ON when the Unit is busy com-
pleting an IOWR/IORD-instruction or being initialised. When this bit is OFF the
Unit is ready to execute the IORD-instruction. If an error occurs during the execu-
tion of the IORD-instruction the ER-flag turns ON.
Note
1.
If you omit to include the Data Transfer Busy bit (CIO n+17, bit 02) in the lad-
der instruction and you start issuing an IORD-instruction while another IOWR/
IORD-instruction is in progress the ER-flag turns ON. Therefore, to guarantee
correct execution of IORD-instructions, you should always use the ladder dia-
gram structure as shown above.
2.
The processing time for IORD instructions can range up to 0.8 ms, depending
on the command issued.
3.
The response time for bits allocated to outputs (e.g., Open Gate Bit) will be
delayed while the Data Transfer Busy bit (CIO n+17, bit 02) is ON (e.g., when
time is required to process IORD or when a Unit is reset). In any case, the bit
allocated to the output will be processed as soon as the Data Transfer Busy
bit turns OFF.
4.
Comparison stops while the Data Transfer Busy bit (CIO n+17, bit 02) is ON.
Refer to section 3-5-1-2
"Configuration and operation in Range Mode"
"Configuration and operation in Comparison Mode"
for details.
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