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NXP Semiconductors
UM11108
FRDM-GD3100EVM half-bridge evaluation board
UM11108
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© NXP B.V. 2018. All rights reserved.
User guide
Rev. 3.0 — 16 August 2018
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Figure 3. Evaluation board voltage and interface domains
Table 2. 24-pin connector definitions
Pin
Name
Function
1
AOUTL
Duty cycle encoded signal (low-side)
2
VSUP
Power input (+12 V)
3
CSBL
Chip select bar (low-side)
4
VDD
5.0 V power
5
PWML
PWM input (low-side)
6
INTBL
Interrupt bar (low-side)
7
MOSIL
Master out slave in (low-side)
8
SCLK
Serial clock input
9
MISOL
Master in Slave out (low-side)
11
FSSTATEL
Fail-safe state (low-side)
12
GND
Ground
13
FSENB
Fail-safe enable (high-side and low-side)
14
MISOH
Master in slave out
15
NC
No connection
16
MOSIH
Master out slave in
17
NC
No connection
18
CSBH
Chip select bar (high-side)
19
NC
No connection
20
AOUTH
Duty cycle encoded signal (high-side)
21
PWMH
PWM input (high-side)
22
FSSTATEH
Fail-safe state (high-side)
23
GND
Ground
24
INTBH
Interrupt bar (high-side)
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