NXP Semiconductors
UM11108
FRDM-GD3100EVM half-bridge evaluation board
UM11108
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
User guide
Rev. 3.0 — 16 August 2018
15 / 25
2. Assemble the FRDM-GD3100EVM with KL25Z micro board and translator board as
shown in
Figure 2
.
3. Check jumper configuration on the evaluation board. The default jumper configuration
(shipped from factory) is setup for non-daisy chain SPI communication with high-
side and low-side driver domains VEE negative supply level active as described in
Figure 5
. Also, ensure jumper J233 is populated on Translator board as in
Figure 11
for powering KL25Z micro.
a. For daisy chain SPI communication of gate drive devices see
Figure 9
and use
daisy chain test interface section only of SPIGEN GUI GD3100 Mode tab.
4. Start SPIGEN application software on PC. Connect USB cable from PC to USBKL25Z
port on KL25Z micro board. A successful connection results in a connection
successful pop-up on the PC with SPIGEN application running.
a. KL25Z micro shipped with proper firmware is already flashed. See
Section 6
"Preparing graphical user interface operating environment"
for additional details.
5. Next supply 12 V DC power to low voltage domain of evaluation board (12 V DC to
VPWR connection point and grounding to GND1 connection point on low voltage
domain).
6. Check high-side and low-side driver domain regulated voltage level by checking
VCCH and VCCL test points for ~17 V DC with respect to grounding to points GNDH
and GNDL in each domain respectively.
a. If voltage level on VCCH and VCCL are low adjust R3 potentiometer for proper
level as shown in
Figure 5
.
7. With proper PC interface connection and voltage levels, SPI communication can be
conducted with MC33GD3100 devices as described in
Section 6.1 "SPIGEN GUI"
and
referencing data sheet for MC33GD3100.
a. Selecting SPI0 communicates with low-side gate drive device and SPI1
communicates with high-side gate drive device (see
Figure 14
).
8. To pass an external PWM signal through each gate drive device, remove jumpers
J235 and J236 from translator board. Connect external PWM signal to high-side
EXT_PWMH or low-side EXT_PWML as described in
Figure 11
. Gate drive output
can be observed on high-side and low-side driver devices on GH_ and GL_ test points
respectively.
9. For double pulse and short-circuit testing with an IGBT and inductive load, use pulse
test GUI under SPIGEN GUI GD3100 for setting pulse widths using KL25Z micro.
a. Jumpers J235 and J236 must be installed on Translator board for passing PWM
signals from KL25Z micro.
b. For short-circuit testing, PWMALT and PWMALT2 must be disconnected to disable
cross-conduction and deadtime protection as described in
Figure 9
.
4.5 Kinetis KL25Z freedom board
The Freedom KL25Z is an ultra-low-cost development platform for Kinetis
®
L Series
MCU built on Arm
®
Cortex
®
-M0+ processor.
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from