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NXP Semiconductors
UM11108
FRDM-GD3100EVM half-bridge evaluation board
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© NXP B.V. 2018.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 16 August 2018
Contents
1
FRDM-GD3100EVM ..............................................1
2
Important notice ..................................................2
3
Getting started .................................................... 3
3.1
Kit contents/packing list .....................................3
3.2
Required equipment .......................................... 3
3.3
System requirements .........................................4
4
Getting to know the hardware ........................... 4
4.1
Board features ................................................... 4
4.2
Device features ..................................................5
4.3
Board description ...............................................5
4.3.1
Voltage domains, GD3100 pinout, logic
header and IGBT pinout ....................................6
4.3.2
Test point definitions ......................................... 8
4.3.3
Power supply and fail-safe jumper
configuration .................................................... 10
4.3.4
Bottom view ..................................................... 11
4.3.5
Gate drive resistors ......................................... 11
4.3.6
LED interrupt indicators ................................... 13
4.3.7
VDD, daisy chain, PWM and PWMALT
disconnects; M653 terminals and pinout ..........14
4.4
Quick start ....................................................... 14
4.4.1
Scope and purpose ......................................... 14
4.4.2
Intended audience ........................................... 14
4.4.3
Setting up and connecting the evaluation kit ....14
4.5
Kinetis KL25Z freedom board ..........................15
4.6
3.3 V to 5.0 V translator board ........................ 16
5
Configuring the hardware ................................ 16
6
Preparing graphical user interface
operating environment ..................................... 17
6.1
SPIGEN GUI ....................................................18
6.1.1
Configuration register ...................................... 19
6.1.2
Status and mask register .................................20
6.1.3
Double pulse and short-circuit test .................. 21
7
Schematics, board layout and bill of
materials .............................................................21
8
References .........................................................22
9
Legal information ..............................................23
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