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NXP Semiconductors
UM11108
FRDM-GD3100EVM half-bridge evaluation board
UM11108
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© NXP B.V. 2018. All rights reserved.
User guide
Rev. 3.0 — 16 August 2018
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Jumper
Position
Function
open
TSENSEA HS non-active (internal test mode only)
shorted
VDDL to VPWR connection
Short only when low voltage domain is powered by external 5.0 V
JVDDL
open
VDDL isolated from external VSUP supply
shorted
VDDH to VPWR connection
Short only when low voltage domain is powered by external 5.0 V
JVDDH
open
VDDH isolated from external VSUP supply
open
SPI MOSI for use in non-daisy chain mode
MOSIDC
shorted
SPI MOSI for use in daisy chain mode (connects MISOL to MOSIH)
1-2
SPI chip select for use in non-daisy chain mode
JCSB
2-3
SPI chip select for use in daisy chain mode (connects CSB pins of
both GD3100 devices)
4.3.4 Bottom view
Figure 6. GD3100 evaluation board bottom view
4.3.5 Gate drive resistors
•
RGH - gate high resistor in series with the GH pin at the output of the MC33GD3100
high-side driver and IGBT gate that controls the turn-on current for IGBT gate.
•
RGL - gate low resistor in series with the GL pin at the output of the MC33GD3100 low-
side driver and IGBT gate that controls the turn-off current for IGBT gate.
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