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NXP Semiconductors
UM11108
FRDM-GD3100EVM half-bridge evaluation board
UM11108
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
User guide
Rev. 3.0 — 16 August 2018
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4.3.7 VDD, daisy chain, PWM and PWMALT disconnects; M653 terminals and
pinout
Figure 9. VDD, daisy chain and PWMALT configuration connections
•
Disable PWM/PWMALT by changing four components. Remove R13 and R14
(normally populated) AND add SH3 and SH5 (normally open) to disable cross
conduction and deadtime protection.
•
SH6 and SH7: normally populated/shorted. Remove shorting resistors to enable SPI
daisy chain operation in conjunction with JCSB and MOSIDC jumpers.
•
JVDDL and JVDDH:
OPEN
Connects VPWR to VDD pins. This jumper is shorted only when the low voltage
domain is powered by an external 5.0 V supply. When this jumper is in place, VPWR
must be 5.0 V.
4.4 Quick start
4.4.1 Scope and purpose
This section provides comprehensive quick start notes for the FRDM-GD3100EVM half-
bridge evaluation kit. Within a few minutes it is possible install SPIGEN application on a
PC, power up half-bridge evaluation kit, and start SPI communication with the GD3100
devices as well as pass PWM signals for evaluation.
4.4.2 Intended audience
Experienced engineers evaluating MC33GD3100 gate drive device for IGBT control.
4.4.3 Setting up and connecting the evaluation kit
1. Download and install latest SPIGEN software – Windows application from NXP.com to
your PC.
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