NXP Semiconductors RDGD3162I3PH5EVB, Руководство пользователя

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NXP Semiconductors
UM11802
RDGD3162I3PH5EVB three-phase inverter reference design
6.2.3 Test points
All test points are clearly marked on the board. Figure 4 shows the location of various
test points.
Figure 4. RDGD3162I3PH5EVB test points
Test point name Function
DSTHU DESAT high-side U phase V
CE
desaturation connected to DESAT pin circuitry
DSTHV DESAT high-side V phase V
CE
desaturation connected to DESAT pin circuitry
DSTHW DESAT high-side W phase V
CE
desaturation connected to DESAT pin circuitry
DSTLU DESAT low-side U phase V
CE
desaturation connected to DESAT pin circuitry
DSTLV DESAT low-side V phase V
CE
desaturation connected to DESAT pin circuitry
DSTLW DESAT low-side W phase V
CE
desaturation connected to DESAT pin circuitry
FSISHU FSISO connection high-side U phase
FSISHV FSISO connection high-side V phase
FSISLU FSISO connection low-side U phase
FSISLV FSISO connection low-side V phase
FSISLW FSISO connection low-side W phase
GHU gate high-side U phase which is the charging pin of IGBT gate
GHV gate high-side V phase which is the charging pin of IGBT gate
GHW gate high-side W phase which is the charging pin of IGBT gate
Table 2. Test points
UM11802 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved.
User manual Rev. 1 — 10 June 2022
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