NXP Semiconductors RDGD3162I3PH5EVB, Руководство пользователя

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NXP Semiconductors
UM11802
RDGD3162I3PH5EVB three-phase inverter reference design
Pin Name Function
A13 GND2 ground
A14 PWMHU pulse width modulation (PWM) high-side phase U
A15 PWMLU pulse width modulation low-side phase U
A16 PWMHV pulse width modulation high-side phase V
A17 PWMLV pulse width modulation low-side phase V
A18 PWMHW pulse width modulation high-side phase W
A19 PWMLW pulse width modulation low-side phase W
A20 GSENLU GD3162 gate strength enable low-side phase U
A21 GSENHU GD3162 gate strength enable high-side phase U
A22 GSENLV GD3162 gate strength enable low-side phase V
A23 GSENHV GD3162 gate strength enable high-side phase V
A24 GSENLW GD3162 gate strength enable low-side phase W
A25 GSENHW GD3162 gate strength enable high-side phase W
A26 INTB_HS GD3162 fault reporting for high-side gate drive devices
A27 INTB_LS GD3162 fault reporting for low-side gate drive devices
A28 INTA_HU GD3162 fault reporting and real-time monitoring high-side phase U
A29 INTA_LU GD3162 fault reporting and real-time monitoring low-side phase U
A30 CSBH chip select bar to high gate drive devices
A31 INTA_HV GD3162 fault reporting and real-time monitoring high-side phase V
A32 INTA_LV GD3162 fault reporting and real-time monitoring low-side phase V
B1 VREF voltage reference from MCU
B2 GNDA2 analog ground
B3 IDC_BUS optional DC bus current measurement from DC bus current filter
B4 VBUS_DIV optional DC bus voltage divider monitoring (not used by default)
B5 n.c. not connected
B6 n.c. not connected
B7 n.c. not connected
B8 SIN_N_OUT_RSLV sine resolver signal
B9 COS_N_OUT_RSLV cosine resolver signal
B10 n.c. not connected
B11 GNDA3 analog ground
B12 MCU_VCC MCU VCC regulator voltage
B13 GND1 ground
B14 AOUTHU GD3162 analog output signal high-side U phase
B15 AOUTLU GD3162 analog output signal low-side U phase
B16 AOUTLV GD3162 analog output signal low-side V phase
Table 1. PCIe connector pin definitions
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UM11802 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved.
User manual Rev. 1 — 10 June 2022
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