NXP Semiconductors
UM11603
RDGD31603PHSEVM three-phase inverter reference design
Figure 31. Status tab
Pulse tab
•
Used for double pulse, short-circuit, and PWM testing
•
Select desired T1, T2, and T3 timings for each test type; select enable then generate
pulses
Note:
Phase U can be configured for performing Double pulse and short-circuit testing.
To enable short-circuit testing, two resistors (R46, R53) must be pulled from PWMALT
phase U signals to disable Deadtime control on Phase U Gate drivers.
Figure 32. Pulse tab
5.4 Troubleshooting
Some common issues and troubleshooting procedures are detailed below. This is not an
exhaustive list by any means, and additional debug may be needed:
UM11063
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User manual
Rev. 1 — 18 August 2021
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