NXP Semiconductors RDGD31603PHSEVM Скачать руководство пользователя страница 32 | Manualshive

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NXP Semiconductors RDGD31603PHSEVM Скачать руководство пользователя страница 32

NXP Semiconductors

UM11603

RDGD31603PHSEVM three-phase inverter reference design

Measurements tab

•

Allows monitoring and graphing of ADC and temperature values

Figure 30. Measurements tab

Status tab

•

Allows monitoring of Status 1, Status 2, and Status 3 register values

•

Status 1 and Status 2 faults can be cleared

•

Status mask registers can be modified when in configuration mode

UM11063

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2021. All rights reserved.

User manual

Rev. 1 — 18 August 2021

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Содержание RDGD31603PHSEVM

Страница 1: ...rmation Content Keywords GD3160 gate driver power inverter Automotive Abstract The RDGD31603PHSEVM three phase inverter is a functional hardware power inverter reference design which can be used as a...

Страница 2: ...rter reference design Revision history Rev Date Description v 1 20210818 Initial version Revision history UM11063 All information provided in this document is subject to legal disclaimers NXP B V 2021...

Страница 3: ...sign as well as attention to supply filtering transient suppression and I O signal quality The goods provided may not be complete in terms of required design marketing and or manufacturing related pro...

Страница 4: ...y See GD3160 data sheet for additional gate drive features 2 Finding kit resources and information on the NXP web site NXP Semiconductors provides online resources for this reference design and its su...

Страница 5: ...sign Studio IDE for power architecture Automotive Math and Motor Control Library AMMCL FreeMaster 2 0 runtime debugging tool Motor Control Application Tuning MCAT Example code GD3160 Device Driver not...

Страница 6: ...See GD3160 advanced IGBT SiC gate driver data sheet for specific information about pinout pin descriptions specifications and operating modes VSUP VPWR DC supply terminal is a low voltage input connec...

Страница 7: ...connected A7 n c not connected A8 SIN_OUT_RSLV Sine resolver signal A9 COS_OUT_RSLV Cosine resolver signal A10 n c not connected A11 GNDA4 Analog ground A12 VCC_PER 5 0 V MCU not connected A13 GND2 G...

Страница 8: ...ected A32 n c not connected B1 VREF Voltage reference from MCU B2 GNDA2 Analog ground B3 n c not connected B4 DCV Optional DC bus voltage monitoring not used by default B5 n c not connected B6 n c not...

Страница 9: ...s test points Figure 3 RDGD31603PHSEVM test points Test point name Function DCV Micro DC voltage DSTHU DESAT high side U phase VCE desaturation connected to DESAT pin circuitry DSTHV DESAT high side V...

Страница 10: ...nals see schematic for signals TSENSEHU TSENSE high side U phase connected to NTC temperature sense TSENSEHV TSENSE high side V phase connected to NTC temperature sense TSENSEHW TSENSE high side W pha...

Страница 11: ...as occurred on the low side INTBH LED Indicates that a GD3160 INTB fault interrupt has occurred on the high side Table 3 RDGD31603PHSEVM indicator descriptions 4 2 5 Connectors and jumpers Figure 5 RD...

Страница 12: ...ice high side 3 device low side x3 2 channel Jumper 1 2 CSB Six device daisy chain all six gate drivers daisy chained together x6 1 channel Phase current feedback connector Current feedback connection...

Страница 13: ...R low voltage positive supply connection 12 V DC VPWR GND VPWR low voltage supply ground connection GND1 Table 5 Power supply test point descriptions 4 2 7 Gate drive resistors RGH RGH gate high resis...

Страница 14: ...T22 G4 D4 D5 S4 S4 G5 S5 S5 T31 T32 C B F D E 5 70 0 13 30 27 33 41 30 60 30 74 67 88 30 107 30 122 128 25 0 40 16 0 20 3x 16 25 9 75 0 40 5 0 40 0 82 87 0 40 90 75 0 40 114 25 1 2 3 20 25 0 40 25 0...

Страница 15: ...ce connection 1 low side U phase T21 NTC temperature sensor connections V phase T22 NTC temperature sensor connections V phase G3 Gate high side V phase D3 Drain high side V phase S3_1 Source connecti...

Страница 16: ...gh side W phase S5_2 Source connection 2 high side W phase G6 Gate low side W phase D6 Drain low side W phase S6_1 Source connection 1 low side W phase S6_2 Source connection 1 low side W phase Table...

Страница 17: ...The Freedom KL25Z is an ultra low cost development platform for Kinetis L series MCU built on Arm Cortex M0 processor Figure 10 Freedom development platform UM11063 All information provided in this d...

Страница 18: ...rol from KL25Z MCU PWMH_SEL J4 2 3 selects PWM high side control from fiber optic receiver inputs 1 2 selects PWM low side control from KL25Z MCU PWML_SEL J5 2 3 selects PWM low side control from fibe...

Страница 19: ...ed at C flexgui app des gd31xx exe Installing the device drivers overwrites any previous FlexGUI installation and replaces it with a current version containing the GD31xx drivers However configuration...

Страница 20: ...ct device to the computer while connected through the KL25Z USB port this is normal 8 The FRDM KL25Z board is now fully set up to work with RDGD31603PHSEVM and the FlexGUI a There is no software store...

Страница 21: ...ee Table 4 for required jumper configuration to enable x3 2 channel or x6 1 channel SPI daisy chain operation Figure 13 Kit selection UM11063 All information provided in this document is subject to le...

Страница 22: ...rence design FlexGUI settings Access settings by selecting Settings from the File menu Figure 14 GUI settings menu UM11063 All information provided in this document is subject to legal disclaimers NXP...

Страница 23: ...eference design The Loader and Logs settings are shown below Figure 15 Loader settings Figure 16 Logs settings UM11063 All information provided in this document is subject to legal disclaimers NXP B V...

Страница 24: ...selecting Settings from the File menu The Register Map and Tabs settings are shown below Figure 17 Register map settings Figure 18 Tabs settings UM11063 All information provided in this document is s...

Страница 25: ...Global workspace controls Always visible in the lower left corner of the main application window GD3160 tab functionality Switch modes between run and configuration mode Set SPI frequency Figure 20 De...

Страница 26: ...on high side and low side FSSTATEL and FSSTATEH set the fail safe state when FSENB is enabled PWML and PWMH set the default state PWM inputs for high side and low side Figure 21 Pins tab functionalit...

Страница 27: ...ers Registers can be read and write by selecting Set to Read and SEND for read and Set to Write and SEND for write Copy button to copy the read values to the write line can be set to copy automaticall...

Страница 28: ...GD31603PHSEVM three phase inverter reference design Figure 24 Register map UM11063 All information provided in this document is subject to legal disclaimers NXP B V 2021 All rights reserved User manua...

Страница 29: ...s All settings are automatically synchronized with the register controls Figure 25 Gate drive tab Current Sense tab Allows setting of parameters related to current sense Provides a more intuitive visu...

Страница 30: ...rs related to desat and segmented drive Provides a more intuitive visual way to set parameters All settings are automatically synchronized with the register controls Figure 27 Desat and segmented driv...

Страница 31: ...synchronized with the register controls Figure 28 Overtemperature tab Undervoltage threshold tab Allows setting of parameters related to undervoltage threshold Provides a more intuitive visual way to...

Страница 32: ...e 30 Measurements tab Status tab Allows monitoring of Status 1 Status 2 and Status 3 register values Status 1 and Status 2 faults can be cleared Status mask registers can be modified when in configura...

Страница 33: ...d short circuit testing To enable short circuit testing two resistors R46 R53 must be pulled from PWMALT phase U signals to disable Deadtime control on Phase U Gate drivers Figure 32 Pulse tab 5 4 Tro...

Страница 34: ...n Clear DTFLT fault bit STATUS2 Check Phase U PWMALT weak pull downs R206 and R57 are in place to bypass dead time faults Consider adjusting dead time settings on GD3160 Change mandatory PWM dead time...

Страница 35: ...domain faults Tune VCC GNDISO using 5 k potentiometer feedback Check VEE level on suspect domain If VEE level is not at desired negative voltage it could cause excessive VCC level Check Zener diode i...

Страница 36: ...atible with HybridPACK Drive module IGBT or SiC MOSFET HybridPACK Drive module Windows based PC High voltage DC power supply for DC link voltage Low voltage DC power supply for VSUP 12 V DC gate drive...

Страница 37: ...information on Advanced single channel gate driver for IGBT SiC http www nxp com GD3160 3 MPC5777C ultra reliable MCU for automotive and industrial engine management http www nxp com MPC5777C 4 MPC57...

Страница 38: ...e by customer s third party customer s Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a defaul...

Страница 39: ...ection pins 15 Fig 10 Freedom development platform 17 Fig 11 Translator board 18 Fig 12 FRDM KL25Z setup and interface 19 Fig 13 Kit selection 21 Fig 14 GUI settings menu 22 Fig 15 Loader settings 23...

Страница 40: ...oints 12 4 2 7 Gate drive resistors 13 4 2 8 SiC module pin connections 14 4 3 Kinetis KL25Z Freedom board 17 4 4 3 3 V to 5 0 V translator board 18 4 5 Schematic board layout and bill of materials 18...

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