MSC8113 Reference Manual, Rev. 0
Freescale Semiconductor
B-5
DALU
Data ALU. Performs arithmetic and logical operations on data operands in
the MSC8113. The source operands for the Data ALU, which may be 16,
32, or 40 bits, originate either from data registers or from immediate data.
The results of all Data ALU operations are stored in the data registers. All
Data ALU operations are performed in one clock cycle. Up to four
parallel arithmetic operations can be performed in each cycle. The
destination of every arithmetic operation can be used as a source operand
for the operation immediately following, without any time penalty.
DAR
Data Address Register
DBB
Data bus busy signal. The MSC8113 asserts this pin as an output for the
duration of its data bus tenure. An external master asserts this signal as an
input to the MSC8113 to maintain data bus tenure.
DBG
Data bus grant signal. The MSC8113 asserts this pin as an output to grant
data bus ownership to an external bus master. The external arbiter asserts
this pin as an input to grant data bus ownership to the MSC8113.
DBRx
Data area Registers [0–3]
DCHCRx
DMA Channel [0–15] Configuration Registers.
DCIR
DSP chip ID register.
DCPRAM
DMA Channel Parameters RAM.
DCR
DSI Control Register.
DDR
DSI Disable Register.
Debug mode
On the MSC8113, the JTAG and IEEE Std. 1149.1 Test Access Port
gives entry to the debug mode of operation. With the EOnCE real-time
debugging capability, users can read the chip’s internal resources without
having to stop the device and go into debug mode. The benefits range
from faster debugging to reduced system development costs and
improved field diagnostics. The SC140 core has a debug mode that is
enabled at reset by pulling up the
DBREQ
/
EE0
pin. See also EOnCE.
DEC
Decrementer register.
DEMR
DMA External Mask Register.
DER
DSI Error Register.
DF
Division factor.
Содержание MSC8113
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Страница 56: ...MSC8113 Reference Manual Rev 0 1 28 Freescale Semiconductor MSC8113 Overview ...
Страница 76: ...MSC8113 Reference Manual Rev 0 2 20 Freescale Semiconductor SC140 Core Overview ...
Страница 134: ...MSC8113 Reference Manual Rev 0 4 30 Freescale Semiconductor System Interface Unit SIU ...
Страница 168: ...MSC8113 Reference Manual Rev 0 6 18 Freescale Semiconductor Boot Program ...
Страница 180: ...MSC8113 Reference Manual Rev 0 7 12 Freescale Semiconductor Clocks ...
Страница 260: ...MSC8113 Reference Manual Rev 0 8 80 Freescale Semiconductor Memory Map ...
Страница 300: ...MSC8113 Reference Manual Rev 0 9 40 Freescale Semiconductor Extended Core ...
Страница 304: ...MSC8113 Reference Manual Rev 0 10 4 Freescale Semiconductor MQBus and M2 Memory ...
Страница 308: ...MSC8113 Reference Manual Rev 0 11 4 Freescale Semiconductor SQBus ...
Страница 544: ...MSC8113 Reference Manual Rev 0 16 46 Freescale Semiconductor Direct Memory Access DMA Controller ...
Страница 590: ...MSC8113 Reference Manual Rev 0 17 46 Freescale Semiconductor Interrupt Processing ...
Страница 614: ...MSC8113 Reference Manual Rev 0 18 24 Freescale Semiconductor Debugging ...
Страница 622: ...MSC8113 Reference Manual Rev 0 19 8 Freescale Semiconductor Internal Peripheral Bus IPBus ...
Страница 724: ...MSC8113 Reference Manual Rev 0 21 32 Freescale Semiconductor UART ...
Страница 920: ...MSC8113 Reference Manual Rev 0 25 150 Freescale Semiconductor Ethernet Controller ...
Страница 1171: ...MSC8113 Reference Manual Rev 0 Freescale Semiconductor C 61 EF wait_rts P 01077FFC 9F rts 71 ...
Страница 1172: ...MSC8113 Reference Manual Rev 0 C 62 Freescale Semiconductor MSC8113 Boot Code ...
Страница 1202: ...MSC8113 Reference Manual Rev 0 Index 30 Freescale Semiconductor Index ...