NXP Semiconductors MMPF0100, Инструкция по программированию, Страница: 27 / 36

AN4536 Application Note Rev. 2.0 1/2014
Freescale Semiconductor 27
OTP Overview
Table 40. ECC Control Registers in the Extended Page 2
Extended Page 2 I
2
C Data bits
Addr Name D7 D6 D5 D4 D3 D2 D1 D0
E1 ECC_CTRL1 ECC1_EN_TBB ECC1_CALC_CIN ECC1_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E2 ECC_CTRL2 ECC2_EN_TBB ECC2_CALC_CIN ECC2_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E3 ECC_CTRL3 ECC3_EN_TBB ECC3_CALC_CIN ECC3_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E4 ECC_CTRL4 ECC4_EN_TBB ECC4_CALC_CIN ECC4_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E5 ECC_CTRL5 ECC5_EN_TBB ECC5_CALC_CIN ECC5_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E6 ECC_CTRL6 ECC6_EN_TBB ECC6_CALC_CIN ECC6_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E7 ECC_CTRL7 ECC7_EN_TBB ECC7_CALC_CIN ECC7_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E8 ECC_CTRL8 ECC8_EN_TBB ECC8_CALC_CIN ECC8_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
E9 ECC_CTRL9 ECC9_EN_TBB ECC9_CALC_CIN ECC9_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
EA ECC_CTRL10 ECC10_EN_TBB ECC10_CALC_CIN ECC10_CIN_TBB[5:0]
0 0 0 0 0 0 0 0
Table 41. ECC_CTRLx Registers Description
Bit Name Default Description
5:0 ECCx_CIN_TBB 0 ECC error location code
See codes on
Table 37
6 ECCx_CALC_CIN 0 Calculate the ECC check bit values
0 = Calculation disabled
1 = Calculation enabled
7 ECCx_EN_TBB 0 This bit is XORed with the EN_ECC_BANKx bit
• If EN_ECC_BANKx bit is programmed, a 1 disables the
ECC function for the respective bank
• If EN_ECC_BANKx bit is not programmed, the
ECCx_EN_TBB acts as a soft EN_ECCx bit