
AN4536 Application Note Rev. 2.0 1/2014
Freescale Semiconductor
19
OTP Overview
For example, if FUSE_POR1 is programmed to “1”, then fuse values are loaded as FUSE_POR_XOR is “1”. If
FUSE_POR2 is then programmed, FUSE_POR_XOR becomes “0” and fuses values cannot be loaded.
SOFT_FUSE_POR is a software version of the FUSE_PORx bits, i.e. it is XORed with the FUSE_PORx bits to
determine whether fuses can be loaded.
See
Table 28
for the XOR truth table for the previous functions listed.
Note: The desired function of the redundant bits must be determined when ECC is configured and its bits
programmed, or the ECC logic attempts to correct the newly programmed redundant bits. ECC is discussed in
Error
Correction Code (ECC)
.
2.4.3
OTP Register Reloading without Turn-on Event
After the fuses are programmed, their values may be loaded into the digital control logic without toggling VIN or
PWRON. To update the TBBOTP registers by reloading the fuse values automatically, set bits in the
OTP LOAD MASK register depending on the functionality required. Refer to
Table 30
for a description of the
OTP LOAD MASK register.
Table 27. OTP FUSE POR XOR Bits Definition
Bit
Name
Description
0
RSVD
Reserved
1
FUSE_POR_XOR
Final result of the XOR function of the FUSE_PORx bits
7:2
RSVD
Reserved
Table 28. Redundant Bit XOR Function Truth Table
Bit1
Bit2
Bit3
XOR bit
0
0
0
0
1
0
0
1
1
1
0
0
1
1
1
1
Table 29. OTP Load Mask Register
Extended Page 1
I
2
C Data Bits
Addr
Reg Name
7
6
5
4
3
2
1
0
84
OTP LOAD MASK
START RL PWRTN
FORCE
PWRCTL
RL
PWRCTL
RL OTP
RL OTP
ECC
RL OTP
FUSE
RSVD
0
0
0
0
0
0
0
0