AN4536 Application Note Rev. 2.0 1/2014
Freescale Semiconductor
25
OTP Overview
2.5.2.2
Analyzing a Single Bit ECC Error
Although not necessary, when a single bit error occurs, the ECC check bits may be read to find out what fuse in a
given bank is in error. The check bits for each bank may be read from bits[5:0], in registers 0xE1 to 0xEA, in the
Extended Page 2. See
Table 37
. For example, if there is an error in bit[5] of fuse bank 3, reading bits[5:0] of register
0xE3 yields a hexadecimal code of 0x15. Refer to
Table 40
and
Table 41
which describe the error control registers.
Table 37. ECC Error Location Coding
Bit in Error
ECC check bit code
0
07
1
0B
2
0D
3
0E
4
13
5
15
6
16
7
19
8
1A
9
1C
10
23
11
25
12
26
13
29
14
2A
15
2C
16
31
17
32
18
34
19
38
20
01
21
02
22
04
23
08
24
10
25
20