NXP Semiconductors Lite5200B, Руководство пользователя, Страница: 32 / 138

Hardware Description
LITE5200B User’s Manual, Rev. 0
4-18 Freescale Semiconductor
Figure 4-5. Power On Reset Switch – SW2
4.6.3 PLL Control
–
SW3
For information on PLL Configuration please refer to Section 5.3 of the MPC5200B user’s Manual.
Figure 4-6. PLL Control – SW3
4.6.4 Low Power Mode
The Lite5200B EVB has circuitry to support a low power mode. This mode consumes less current than the
wait or sleep modes of the MPC5200B because it powers down most of the board. In this mode the 1.5V
and 3.3V power supplies are disabled but the 2.5V DDR power supply is left enabled. This allows the
MPC5200B to gracefully shutdown by storing operational context into DDR RAM and putting the RAM
into a self refresh mode before going to low power. On subsequent restart, this information can be used to
restore operational state and quickly resume operation.
Supported features include: 1) a pushbutton controlled signal from the low power mode control circuit to
the MPC5200B requesting preparation for low power mode, 2) a signal from the MPC5200 to the control
circuit causing low power mode to be entered, 3) a pushbutton in the control circuitry to cause return to
normal power mode, 4) a signal from the control circuit to the MPC5200B indicating when power up is
from a low power mode (instead of a cold power up), and 5) a signal from the MPC5200B to the control
circuitry indicating that recovery from low power mode is complete. Each feature and signal will be
discussed in more detail below.
4.6.4.1 Low Power Control Circuitry
The low power control circuitry on the Lite5200B EVB consists of U34, SW4, and R208. Power for the
control circuitry (3.3V) is supplied by U33 and associated resistors and capacitors and is separate from the
3.3V supply for the rest of the board. U34 is a MC68HLC908QT1 microcontroller programmed to use
inputs from SW4 and the MPC5200B and to provide signals to the MPC5200B and the 1.5V and 3.3V
regulators. SW4 is used to initiate a signal requesting the MPC5200B to prepare for low power mode. It
is also used to return the system to full power when in the low power mode. The QT1 debounces SW4 with
TO PIN 3 (MR)
of U20 (MAX6717UKSHD3-T)
PLL_CFG 4
PLL_CFG 3
PLL_CFG 2
PLL_CFG 1
PLL_CFG 0
PORCFG[31]
PORCFG[30]
PORCFG[29]
PORCFG[28]
PORCFG[27]
DEFAULT
CONFIGURATION
1 0