NXP Semiconductors Lite5200B, Руководство пользователя, Страница: 121 / 138

LITE5200B User’s Manual, Rev. 2
Freescale Semiconductor Glossary-3
Changed bit. One of two page history bits found in each page table entry (PTE). The
processor sets the changed bit if any store is performed into the page . See also
Page access history bits and Referenced bit .
Clean. An operation that causes a cache block to be written to memory, if modified, and
then left in a valid, unmodified state in the cache.
Clear. To cause a bit or bit field to register a value of zero. See also Set .
Context synchronization. An operation that ensures that all instructions in execution
complete past the point where they can produce an exception , that all instructions
in execution complete in the context in which they began execution, and that all
subsequent instructions are fetched and executed in the new context. Context
synchronization may result from executing specific instructions (such as isync or
rfi ) or when certain events occur (such as an exception).
Copy-back operation. A cache operation in which a cache line is copied back to memory
to enforce cache coherency. Copy-back operations consist of snoop push-out
operations and cache cast-out operations.
D
Denormalized number. A nonzero floating-point number whose exponent has a reserved
value, usually the format's minimum, and whose explicit or implicit leading
significand bit is zero.
Direct-mapped cache. A cache in which each main memory address can appear in only
one location within the cache, operates more quickly when the memory request is
a cache hit.
Direct-store segment access. An access to an I/O address space. The 603 defines separate
memory-mapped and I/O address spaces, or segments, distinguished by the
corresponding segment register T bit in the address translation logic of the 603. If
the T bit is cleared, the memory reference is a normal memory-mapped access and
can use the virtual memory management hardware of the 603. If the T bit is set,
the memory reference is a direct-store access.
E
Effective address (EA). The 32-bit address specified for a load, store, or an instruction
fetch. This address is then submitted to the MMU for translation to either a
physical memory address or an I/O address.
Exception. A condition encountered by the processor that requires special,
supervisor-level processing.
Exception handler. A software routine that executes when an exception is taken.
Normally, the exception handler corrects the condition that caused the exception,
or performs some other meaningful task (that may include aborting the program
that caused the exception). The address for each exception handler is identified by
an exception vector offset defined by the architecture and a prefix selected via the
MSR.