NXP Semiconductors
KTFRDMMC36XSDEVBUG
FRDM-MC36XSD-EVB evaluation board
KTFRDMMC36XSDEVBUG
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User guide
Rev. 1.0 — 30 August 2016
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Number
Name
Description
9
Supply connector
Power connection for V
PWR
and Ground
10
Outputs connectors
Power connection for Outputs HS0..3 of both devices and Ground
5.8.1 Input signal definitions
The following input signals control the outputs or functions inside the circuit.
Table 3. Input signal definitions
Input name
Description
GPIO0..3
Logic input to control the output state of HS0..3
MOSI
Master out slave input for the SPI
CSB
Chip select bar input for the SPI
SCLK
Clock for the SPI
RSTB
Reset of devices. Active low
CLOCK
External clock for PWM
5.8.2 Output signal definitions
In addition to driving a load, the FRDM-MC36XSD-EVB provides analog output for real
time current monitoring and uses the following output signals to reflect the fault and
device status.
Table 4. Output signal definitions
Output name
Description
FSB
Open drain active low status flag output to indicate fault
FSOB
Open drain active low fail-safe output
MISO
Master in slave out output for the SPI
CSNS
Analog monitoring of output current and ICs temperature
SYNC
Trigger signal for measurements on CSNS pin
HS0..3
Power outputs of both devices
5.9 Screw terminal connections
The board has the following screw terminal connections to connect the power supply and
the load.