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NXP Semiconductors
KTFRDMMC36XSDEVBUG
FRDM-MC36XSD-EVB evaluation board
KTFRDMMC36XSDEVBUG
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2016. All rights reserved
User guide
Rev. 1.0 — 30 August 2016
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5.6 Internal block diagram
aaa-024245
Drain/gate
clamp
Charge
pump
Over/undervoltage
protection
POR
Internal
regulator
V
DD
failure
detection
Overtemperature
prewarning
Selectable slew rate
gate driver
Selectable overcurrent
detection
Severe short-circuit
detection
Short-circuit to
VPWR detection
Overtemperature
detection
OpenLoad
detection
*blocks marked in grey have been implemented
independently for each of both channels
GND
Output
current sense
Analog MUX
Temperature
feedback
VDD
VPWR
HS0
HS0
HS1
HS1
CSNS
SYNC
R
D
W
N
I
D
W
N
V
REG
I
U
P
CSB
SCLK
SO
SI
RSTB
IN0
FSB
IN1
FSOB
CONF0
CONF1
CLOCK
Calibratable
Oscillator*
PWM
Module*
Control
Logic
I
DWN
I
UP
V
REG
Figure 3. Internal block diagram