Frequency
Amplitude
3S
F
2S
F
S
F
4P
F
3P
F
2P
F
P
F
Figure 8. Spectral content on Pulsed Mode
There are two frequency domains in Pulsed Mode; P
F
and S
F
. The P
F
is the Pulsed Frequency and S
F
is the Switching Frequency.
The P
F
varies according to the loading and if we consider, for example, P
F
= 2.5 kHz, the lower frequency domain has this
fundamental frequency and the harmonics 5.0 kHz, 7.5 kHz, 10 kHz, and so on. The S
F
is equal to 2 MHz, so on the right side of
the above chart, the spectrum content is 2 MHz, 4 MHz, 6 MHz, and so on.
This information must be considered on applications sensitive to a particular frequency domain, such as another radio or
transceiver that may suffer interference from the DC-DC. For cases where P
F
and its harmonics cause interference, it is possible
to shift right or left the P
F
by simply using a different DC-DC software configuration, such as changing the hysteresis, FET size,
half clock for pulsed mode or adding a larger tank capacitor.
If P
F
is interfering on other circuits, there are many combinations for shifting right or left the P
F
. Some tests were performed
on a test board containing just the microcontroller with device running in VLPR pulsed mode and a minimal number of internal
modules enabled. For this example (which uses the default DC-DC register values, the P
F
measured 2.4 kHz. By just changing
the hysteresis bits, it was possible to move P
F
from 1.53 kHz to 3.8 kHz. This is only one example on how to perform a frequency
shifting. Many other combinations can be performed to fine-tune the P
F
based on system loading.
4.4 Shutting down DC-DC
Shutting down the DC-DC is only allowed when DC-DC is configured as Buck Mode Manual Start. An attempt to shut down in either
Boost or Buck Auto Start modes cause the DC-DC module to enter an abnormal state, requiring a power cycle to reset the DC-DC.
On Buck Mode Manual Start, before shutting down the DC-DC, software must verify if PSWITCH is released (0 volts present), and
if this condition is true, then DC-DC may be turned off. Otherwise, the DC-DC shutdown should be aborted.
To shut down the DC-DC is necessary to write the Unlock bits at the same time as setting the DCDC_SW_SHUTDOWN bit. The
procedure is shown in the below flowchart.
NXP Semiconductors
DC-DC converter software setup
MKW4xZ/3xZ/3xA/2xZ DC-DC Power Management, Rev. 3, 04 June 2021
Application Note
12 / 28
