Before entering low-power mode (pulsed), this bit must be set to disable the stepping control.
4.5.5 DCDC_REG7
This register is used to bypass the DCDC_BATTMONITOR_BATT_VAL configuration and manually configure the Integrator Value
for the loop control. It is recommended to use the BattMonitor control loop method, leaving this register in its default state.
• DCDC_REG7[PULSE_RUN_SPEEDUP]
This bit speeds up the refresh rate in low-power mode. To use this feature, set the integrator value manually based on battery
voltage and output target. Then DC-DC will stop after reaching target voltage. In next resume, it will pick the manually entered
integrator value.
5 Hardware design Guidelines
5.1 DC-DC inductor and capacitor layout recommendation
When laying out the inductor and capacitor in your design, it is important to understand how the DC-DC switching works and
the paths that the current take. In a buck converter, the higher frequency contents of the inductor current will circulate in one
of two loops: the first when charging (charging phase), the second when discharging (rectification phase). The figure below is a
simplified circuit diagram of the DC-DC that demonstrates these paths with the red line outlining the charge path and the yellow line
outlining the discharge path. Note that the capacitors and inductor are all external components while the transistors are internal
components. The open circles denote MCU pins.
C402
M1
Input
1.8 V
8
13
11
M4
M3
9
10,12
M2
C410
C418
1.5 V
C402
M1
Input
1.8 V
8
13
11
M4
M3
9
10,12
M2
C410
C418
1.5 V
Figure 10. Charge and discharge current paths during buck mode
Since this DC-DC converter has two outputs, there are four current loops to be aware of. These loops are shown in the
following figure.
NXP Semiconductors
Hardware design Guidelines
MKW4xZ/3xZ/3xA/2xZ DC-DC Power Management, Rev. 3, 04 June 2021
Application Note
16 / 28
