In Buck mode, at steady state, the DC-DC converter accepts input voltages ranging from 1.8 V to 3.6 V (4.2 V for certain use cases
on KWx1Z; refer to the device-specific data sheet for conditions and limits). To guarantee the startup, it is necessary to have a
minimum input voltage of 2.1 V. The typical conversion efficiency is 90%.
There are two ways to start the DC-DC in Buck mode: Manual and Auto-Startup. The main difference is that on Auto-Startup,
when the VDCDC_IN voltage is applied, the DC-DC immediately starts the PWM, generating voltages on VDD_1P8 and VDD_1P5
outputs. In manual mode, the DC-DC is triggered to start after a pulse/level high on the PSWITCH.
It is possible to shut down the DC-DC after it has started, only in Buck Manual mode. The application must ensure that the
PSWITCH is not at a logic high level when the DC-DC is shut down. Otherwise, the DC-DC enters an abnormal state.
The tank capacitors connected to VDD_1P8 and VDD_1P5 must be in the range of 10 µF to 30 µF. Capacitor values outside this
range can have negative effects on the control loop response of the DC-DC converter. Larger capacitor value can save power
consumption in low-power mode due to a longer interval between refresh. However, if the capacitance is too great (greater than
30 uF) the DC-DC converter may not regulate properly. The lower ESR (Equivalent Series Resistance), the better for efficiency.
3.2.1 Buck Mode – Manual Startup
In this mode, the DC-DC is not automatically started upon the presence of voltage on VDCDC_IN. Instead, the DC-DC is started
after a pulse or level high on the PSWITCH pin; This pulse may come from a push button, switch, or externally generated by
another device. In either case, PSWITCH must be above the required startup level for longer than the DC-DC turn on time for the
DC-DC to start up correctly (refer to the device-specific data sheet for the PSWITCH VIH level and DC-DC turn on time). If an
external device is used, the application must guarantee the correct power-up sequence and voltage levels. This means:
• PSWITCH cannot be at a higher voltage than VDCDC_IN. Otherwise, the internal protection diode is forward biased,
damaging the device.
• The controlling circuit must keep PSWITCH at V
IH
voltage level with respect to VDCDC_IN. VIH voltage is defined in this
case as 0.7 x VDCDC_IN for 2.7 V <= VDCDC_IN or 0.75 x VDCDC_IN for 1.7 V <= VDD <= 2.7 V, unless otherwise
specified by the Voltage and current operating requirements table of the device-specific data sheet.
To shut down the DC-DC in this mode, the PSWITCH pin must be at a low logic level, and it is necessary to set the
DCDC_SW_SHUTDOWN bit at the same time as writing the unlock key 0x3E77 to the Unlock bits on register DCDC_REG4.
Below are the recommended hardware configurations for DC-DC converter in Buck Manual Start mode.
NXP Semiconductors
DC-DC Power modes
MKW4xZ/3xZ/3xA/2xZ DC-DC Power Management, Rev. 3, 04 June 2021
Application Note
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