N
X
P
S
e
m
ic
o
n
d
u
c
to
rs
Q
u
ic
k
s
ta
rt
Q
u
ic
k
s
ta
rt
A
D
C
1
4
1
2
D
, A
D
C
1
2
1
2
D
, A
D
C
1
1
1
2
D
s
e
ri
e
s
Q
u
ic
k
s
ta
rt
Q
S
_
A
D
C
1
4
1
2
D
_
7
.d
o
c
R
e
v
. 7
—
6
A
u
g
u
s
t 2
0
1
0
2
6
o
f 4
1
3.2 ADC1412D LVDS outputs
The
figure 26
below shows an overview of the whole system AHSDC extension module with LVDS outputs configuration for which
connection is done with a bridge SAMTEC, together with a supply extension module (release B) for the ADC1412D demo-board:
Fig 26. Evaluation set-up measurement with ADC1412D LVDS and HSDC extension module
Note 1: make sure that supply extension release B is used: it delivers the 3 V supply for LVDS output path for the ADC.
Note 2: make sure that LVDS connection is done as shown.
USB
SPI
MODULE
P
RESENTED CONFIGURATION
. Single-ended clock on CLKP
. 2 V
pp
input full scale
. Binary LVDS outputs
C
LOCK SIGNAL
. e.g 125 Msps
CLOCK
GENERATOR
R
EFERENCE SIGNAL
. e.g 170 MHz
SIGNAL
GENERATOR
+5V
POWER SUPPLY
. I = 3.2 A
USB
SPI
MODULE
+5
V
POWER SUPPLY
. I = 3.2 A
B
RIDGE
SAMTEC
. to connect LVDS DDR data path