NOVATECH INSTRUMENTS
9
DDS9m Manual
POWER
LOGIC
32-Bit
DDS,
LP Filter,x4
AMP,x4
Sine
OUT
Buffer,x4
LVCMOS
OUT
POWER
FILTERS &
+5V
-5V
Master
Clock
EXT
CLK
IN
CLK SEL
Figure 3.
Simplified System Block Diagram
DDS9m Module
RS232
µ
C
System Control
+1.8V
REGULATOR
Voltage
Control
AD9959
+3.3V
+3.3V
“Que”
command output (all values are hexadecimal) values:
05F5E100 0000 0000 03FF 00000000 00000000 000301
05F5E100 0000 0000 03FF 00000000 00000000 000301
05F5E100 0000 0000 03FF 00000000 00000000 000301
05F5E100 0000 0000 03FF 00000000 00000000 000301
80 BC0000 0000 6102 21
Description:
Line 1:
“05F5E100”,
frequency in 0.1Hz steps per LSB;
“0000”
, phase setting;
“03FF”
, amplitude setting
(default is scaling off);
“0000”
, linear ramp rate;
“00000000”
, rising delta frequency;
“00000000”
, falling
delta frequency,
“000301”
, channel function register.
The last line gives the status of AD9959 registers and internal software registers:
“80”
, channel select register
(CSR);
“BC0000”
, function register 1 (FR1);
“0000”
, function register 2 (FR2); “
6102”
, internal
µ
C control
registers;
“21”
, software revision as x.y, Rev 2.1 in this example. Consult the Analog Devices AD9959 data sheet
for meaning of registers. Each line is terminated by a carriage return/line feed (CRLF) pair.
