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12

DDS9m Manual

6.4  Sine Out Amplitude Verification. Set the fre-
quency of the DDS9m to 10MHz. Connect the

 

DDS9m to the oscilloscope set for 50

 termination.

 

Set the oscilloscope to measure to amplitude using

 

at least 16 averages. Verify a reading of 1Vpp

±

0.25Vpp. Repeat for the other outputs.

6.5  Level Command Test. Leave the output fre-
quency set to 10MHz. Send the commands 

“Vn

 

512”

 to each channel, where 

‘n’

 is your selected

 

channel number. Verify that the amplitude on each

 

channel decreases by one-half. Send the 

“R”

 com-

mand to reset the levels before performing the next

 

tests.

6.6  Output Flatness Verification. Verify that the

 

outputs are flat with frequency by performing the

 

following test: Connect the DDS9m to the oscillo-
scope set for 50

 termination. Use the same settings

 

as Sine Out Amplitude Verification. Note the volt-
age reading.

6.7  Set the DDS9m to the values of Table 4. Verify

 

that the oscilloscope amplitude reading remains

 

within 

±

3dB (1.414 to 0.707) of the value noted in

 

the previous paragraph. (limit upper frequency

 

to150MHz)

6.8  Repeat the output flatness verification test for

 

each output.

6.9  External Clock Input Verification. Set the fre-
quency output to 10.000MHz by sending the com-
mand 

“F0 10.7374182”

 (scaled per section

 

4.0). Connect a 400MHz external clock source via a

 

short coaxial cable to the external clock MCX. Send

 

the command 

“Kp 01”

. Send the command 

“C

 

e”

 to select the external clock input.

6.10  Verify an output of 10.0000000MHz, 

±

0.1Hz.

 

You must account for any frequency errors in your

 

external clock source.

NOVATECH INSTRUMENTS

6.11  Return the DDS9m to normal operation and
default values by sending the 

“CLR”

 command.

6.12  This concludes the verification test of the
DDS9m.

7.0

CALIBRATION

7.1  The DDS9m has two adjustable components:
Y2, frequency, and R22, output amplitude. Calibra-
tion should be performed only if the DDS9m fails
the performance test or if the unit has been repaired.
Routine adjustments are not recommended nor gen-
erally required. This procedure assumes that the
DDS9m has failed the performance test or has been
repaired.

7.2  Before proceeding with calibration, send the

‘CLR’

 command to set the DDS9m to factory

default values.

WARNING:

Calibration should be performed only by qualified 

personnel. The on-board components are static 

sensitive.

7.3  The adjustments shown are set to 1/2 the speci-
fication values.

NOTE:

Allow the DDS9m to warm up for at least 15 minutes 

before performing any adjustments. For optimum 

performance the DDS9m should be calibrated in an 

environment similar to its installation.

7.4  Frequency Adjust, Y2. Set the output of the
DDS9m to 10.0000000MHz using the command

“F0 10.0000000”

. Connect output of channel 0

to your frequency counter set for 50

 termination.

Adjust Y2 using a non-metallic adjustment tool for
10.000000MHz, 

±

7.5Hz.

7.5  Amplitude Adjust, R22. Connect the output of
channel 0 to the oscilloscope set to measure ampli-
tude, with a minimum of 16 averages. Set for 50

termination. Set the output to 35MHz by sending the
command 

“F0 35.0000000”. 

Adjust R22 for

1.00Vpp 

±

0.05Vpp. This completes the calibration

of the Model DDS9m.

30 MHz

±

45 Hz 

±

1 LSD

50 MHz

±

75 Hz 

±

1 LSD

100 MHz

±

150 Hz 

±

1 LSD

170 MHz

±

255 Hz 

±

1 LSD

Table 4: Frequency Test Points

Frequency

Tolerance

Содержание DDS9m

Страница 1: ...m 170MHz 4 Channel Signal Generator Module DDS9m Table of Contents Section Page Contents 1 0 2 Description 2 0 2 Specifications 3 0 2 Hardware Installation 4 0 7 Operation 5 0 10 Theory of Operation 6...

Страница 2: ...o 40oC Stable to an addi tional 1ppm per year 18 to 28oC Internal Clock 2 5 EXTERNAL CLOCK IN LEVEL 0 2 to 0 5Vrms Sine or Square Wave 50 FREQUENCY 10MHz to 125MHz with multiplier of 4 to NOVATECH INS...

Страница 3: ...knowledge of the operation of the Analog Devices AD9959 DDS generator is required Since all registers are accessible it is possible to set the board into a non functional mode requiring a reset Appli...

Страница 4: ...the phase is not cleared default See Section 4 for details Vn N Set voltage level of output n In default the amplitude is set to the maximum approximately 1Vpp 4dBm into 50 N can range from 0 off to 1...

Страница 5: ...10 0 15 3 78 7 85 1 3 10 3 35 4 22 9 85 1 0 90 3 35 5 5 08 85 1 0 20 3 35 3 3V DC RS232 EXT CLK BATT B U HIGH SPEED INTERFACE VTUNE SINE OUTs LVCMOS OUTs MCXs WIRE PTs 0 0 MCX 115 2kBaud Select 1 2 3...

Страница 6: ...V be placed between the DDS9m and your system You may use the 3 3 V on pin 2 of P4 for this power up to 50mA Pin Number Function Type Pin Number Function Type 1 Ground Power Supply Com mon PS 2 3 3 V...

Страница 7: ...the MCX outputs The square pad is the LVCMOS output and the round pad is ground If NOVATECH INSTRUMENTS you are not using the LVCMOS TTL output it is suggested that it be disabled by sending the A D...

Страница 8: ...ernal clock will be assuming Kp is unchanged NOVATECH INSTRUMENTS Fn 4 4209530 where n is your selected channel NOTE You must account for your clock frequency error and calculation roundoff when using...

Страница 9: ...0000 03FF 00000000 00000000 000301 80 BC0000 0000 6102 21 Description Line 1 05F5E100 frequency in 0 1Hz steps per LSB 0000 phase setting 03FF amplitude setting default is scaling off 0000 linear ram...

Страница 10: ...TER_RESET PWR_DWN_CTL CS are set by the on board microcomputer at power up and are not accessible on the high speed interface The table mode or table RAM is not accessible from the high speed interfac...

Страница 11: ...data sheet your value of Kp times your selected clock frequency must not be between 160MHz and 255MHz For the internal clock values of Kp from 5 to 9 should not be used You may also need to set the VC...

Страница 12: ...xternal clock source NOVATECH INSTRUMENTS 6 11 Return the DDS9m to normal operation and default values by sending the CLR command 6 12 This concludes the verification test of the DDS9m 7 0 CALIBRATION...

Страница 13: ...xecution of table 0000 two byte RAM address T0 and T1 must be paired with same address aabbccdd four bytes frequency hexadecimal MSB first 4 bytes 0 1Hz resolution on LSB eeff phase offset hexadecimal...

Страница 14: ...fitness for a particular purpose In no event shall seller be liable for collateral or consequential damages Some states do not allow limitations or exclusion of consequential damages so this limitatio...

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